Back to home page

OSCL-LXR

 
 

    


0001 GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
0002 =================================================================
0003 This uses GPIO lines and a challenge & response mechanism to arbitrate who is
0004 the master of an I2C bus in a multimaster situation.
0005 
0006 In many cases using GPIOs to arbitrate is not needed and a design can use
0007 the standard I2C multi-master rules.  Using GPIOs is generally useful in
0008 the case where there is a device on the bus that has errata and/or bugs
0009 that makes standard multimaster mode not feasible.
0010 
0011 Note that this scheme works well enough but has some downsides:
0012 * It is nonstandard (not using standard I2C multimaster)
0013 * Having two masters on a bus in general makes it relatively hard to debug
0014   problems (hard to tell if i2c issues were caused by one master, another, or
0015   some device on the bus).
0016 
0017 
0018 Algorithm:
0019 
0020 All masters on the bus have a 'bus claim' line which is an output that the
0021 others can see. These are all active low with pull-ups enabled.  We'll
0022 describe these lines as:
0023 
0024 - OUR_CLAIM: output from us signaling to other hosts that we want the bus
0025 - THEIR_CLAIMS: output from others signaling that they want the bus
0026 
0027 The basic algorithm is to assert your line when you want the bus, then make
0028 sure that the other side doesn't want it also.  A detailed explanation is best
0029 done with an example.
0030 
0031 Let's say we want to claim the bus.  We:
0032 1. Assert OUR_CLAIM.
0033 2. Waits a little bit for the other sides to notice (slew time, say 10
0034    microseconds).
0035 3. Check THEIR_CLAIMS.  If none are asserted then the we have the bus and we are
0036    done.
0037 4. Otherwise, wait for a few milliseconds and see if THEIR_CLAIMS are released.
0038 5. If not, back off, release the claim and wait for a few more milliseconds.
0039 6. Go back to 1 (until retry time has expired).
0040 
0041 
0042 Required properties:
0043 - compatible: i2c-arb-gpio-challenge
0044 - our-claim-gpio: The GPIO that we use to claim the bus.
0045 - their-claim-gpios: The GPIOs that the other sides use to claim the bus.
0046   Note that some implementations may only support a single other master.
0047 - I2C arbitration bus node. See i2c-arb.txt in this directory.
0048 
0049 Optional properties:
0050 - slew-delay-us: microseconds to wait for a GPIO to go high. Default is 10 us.
0051 - wait-retry-us: we'll attempt another claim after this many microseconds.
0052     Default is 3000 us.
0053 - wait-free-us: we'll give up after this many microseconds. Default is 50000 us.
0054 
0055 
0056 Example:
0057         i2c@12ca0000 {
0058                 compatible = "acme,some-i2c-device";
0059                 #address-cells = <1>;
0060                 #size-cells = <0>;
0061         };
0062 
0063         i2c-arbitrator {
0064                 compatible = "i2c-arb-gpio-challenge";
0065 
0066                 i2c-parent = <&{/i2c@12CA0000}>;
0067 
0068                 our-claim-gpio = <&gpf0 3 1>;
0069                 their-claim-gpios = <&gpe0 4 1>;
0070                 slew-delay-us = <10>;
0071                 wait-retry-us = <3000>;
0072                 wait-free-us = <50000>;
0073 
0074                 i2c-arb {
0075                         #address-cells = <1>;
0076                         #size-cells = <0>;
0077 
0078                         i2c@52 {
0079                                 // Normal I2C device
0080                         };
0081                 };
0082         };