0001 OMAP SSI controller bindings
0002
0003 OMAP3's Synchronous Serial Interface (SSI) controller implements a
0004 legacy variant of MIPI's High Speed Synchronous Serial Interface (HSI),
0005 while the controller found inside OMAP4 is supposed to be fully compliant
0006 with the HSI standard.
0007
0008 Required properties:
0009 - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
0010 - reg-names: Contains the values "sys" and "gdd" (in this order).
0011 - reg: Contains a matching register specifier for each entry
0012 in reg-names.
0013 - interrupt-names: Contains the value "gdd_mpu".
0014 - interrupts: Contains matching interrupt information for each entry
0015 in interrupt-names.
0016 - ranges: Represents the bus address mapping between the main
0017 controller node and the child nodes below.
0018 - clock-names: Must include the following entries:
0019 "ssi_ssr_fck": The OMAP clock of that name
0020 "ssi_sst_fck": The OMAP clock of that name
0021 "ssi_ick": The OMAP clock of that name
0022 - clocks: Contains a matching clock specifier for each entry in
0023 clock-names.
0024 - #address-cells: Should be set to <1>
0025 - #size-cells: Should be set to <1>
0026
0027 Each port is represented as a sub-node of the ti,omap3-ssi device.
0028
0029 Required Port sub-node properties:
0030 - compatible: Should be set to the following value
0031 ti,omap3-ssi-port (applicable to OMAP34xx devices)
0032 ti,omap4-hsi-port (applicable to OMAP44xx devices)
0033 - reg-names: Contains the values "tx" and "rx" (in this order).
0034 - reg: Contains a matching register specifier for each entry
0035 in reg-names.
0036 - interrupts: Should contain interrupt specifiers for mpu interrupts
0037 0 and 1 (in this order).
0038 - ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE
0039 events for the port. This is an optional board-specific
0040 property. If it's missing the port will not be
0041 enabled.
0042
0043 Optional properties:
0044 - ti,hwmods: Shall contain TI interconnect module name if needed
0045 by the SoC
0046
0047 Example for Nokia N900:
0048
0049 ssi-controller@48058000 {
0050 compatible = "ti,omap3-ssi";
0051
0052 /* needed until hwmod is updated to use the compatible string */
0053 ti,hwmods = "ssi";
0054
0055 reg = <0x48058000 0x1000>,
0056 <0x48059000 0x1000>;
0057 reg-names = "sys",
0058 "gdd";
0059
0060 interrupts = <55>;
0061 interrupt-names = "gdd_mpu";
0062
0063 clocks = <&ssi_ssr_fck>,
0064 <&ssi_sst_fck>,
0065 <&ssi_ick>;
0066 clock-names = "ssi_ssr_fck",
0067 "ssi_sst_fck",
0068 "ssi_ick";
0069
0070 #address-cells = <1>;
0071 #size-cells = <1>;
0072 ranges;
0073
0074 ssi-port@4805a000 {
0075 compatible = "ti,omap3-ssi-port";
0076
0077 reg = <0x4805a000 0x800>,
0078 <0x4805a800 0x800>;
0079 reg-names = "tx",
0080 "rx";
0081
0082 interrupt-parent = <&intc>;
0083 interrupts = <67>,
0084 <68>;
0085
0086 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
0087 }
0088
0089 ssi-port@4805a000 {
0090 compatible = "ti,omap3-ssi-port";
0091
0092 reg = <0x4805b000 0x800>,
0093 <0x4805b800 0x800>;
0094 reg-names = "tx",
0095 "rx";
0096
0097 interrupt-parent = <&intc>;
0098 interrupts = <69>,
0099 <70>;
0100
0101 }
0102 }
