0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/gpu/vivante,gc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Vivante GPU Bindings
0008
0009 description: Vivante GPU core devices
0010
0011 maintainers:
0012 - Lucas Stach <l.stach@pengutronix.de>
0013
0014 properties:
0015 compatible:
0016 const: vivante,gc
0017
0018 reg:
0019 maxItems: 1
0020
0021 interrupts:
0022 maxItems: 1
0023
0024 '#cooling-cells':
0025 const: 2
0026
0027 assigned-clock-parents: true
0028 assigned-clock-rates: true
0029 assigned-clocks: true
0030
0031 clocks:
0032 items:
0033 - description: AXI/master interface clock
0034 - description: GPU core clock
0035 - description: Shader clock (only required if GPU has feature PIPE_3D)
0036 - description: AHB/slave interface clock (only required if GPU can gate
0037 slave interface independently)
0038 minItems: 1
0039
0040 clock-names:
0041 items:
0042 enum: [ bus, core, shader, reg ]
0043 minItems: 1
0044 maxItems: 4
0045
0046 resets:
0047 maxItems: 1
0048
0049 power-domains:
0050 maxItems: 1
0051
0052 required:
0053 - compatible
0054 - reg
0055 - interrupts
0056 - clocks
0057 - clock-names
0058
0059 additionalProperties: false
0060
0061 examples:
0062 - |
0063 #include <dt-bindings/clock/imx6qdl-clock.h>
0064 #include <dt-bindings/interrupt-controller/arm-gic.h>
0065 gpu@130000 {
0066 compatible = "vivante,gc";
0067 reg = <0x00130000 0x4000>;
0068 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
0069 clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>,
0070 <&clks IMX6QDL_CLK_GPU3D_CORE>,
0071 <&clks IMX6QDL_CLK_GPU3D_SHADER>;
0072 clock-names = "bus", "core", "shader";
0073 power-domains = <&gpc 1>;
0074 };
0075
0076 ...
