0001 Device tree configuration for the GFX display device on the ASPEED SoCs
0002
0003 Required properties:
0004 - compatible
0005 * Must be one of the following:
0006 + aspeed,ast2500-gfx
0007 + aspeed,ast2400-gfx
0008 * In addition, the ASPEED pinctrl bindings require the 'syscon' property to
0009 be present
0010
0011 - reg: Physical base address and length of the GFX registers
0012
0013 - interrupts: interrupt number for the GFX device
0014
0015 - clocks: clock number used to generate the pixel clock
0016
0017 - resets: reset line that must be released to use the GFX device
0018
0019 - memory-region:
0020 Phandle to a memory region to allocate from, as defined in
0021 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
0022
0023
0024 Example:
0025
0026 gfx: display@1e6e6000 {
0027 compatible = "aspeed,ast2500-gfx", "syscon";
0028 reg = <0x1e6e6000 0x1000>;
0029 reg-io-width = <4>;
0030 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
0031 resets = <&syscon ASPEED_RESET_CRT1>;
0032 interrupts = <0x19>;
0033 memory-region = <&gfx_memory>;
0034 };
0035
0036 gfx_memory: framebuffer {
0037 size = <0x01000000>;
0038 alignment = <0x01000000>;
0039 compatible = "shared-dma-pool";
0040 reusable;
0041 };
