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OSCL-LXR

 
 

    


0001 Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
0002 
0003 The Western Digital MyBook Live has two memory-mapped GPIO controllers.
0004 Both GPIO controller only have a single 8-bit data register, where GPIO
0005 state can be read and/or written.
0006 
0007 Required properties:
0008         - compatible: should be "wd,mbl-gpio"
0009         - reg-names: must contain
0010                 "dat" - data register
0011         - reg: address + size pairs describing the GPIO register sets;
0012                 order must correspond with the order of entries in reg-names
0013         - #gpio-cells: must be set to 2. The first cell is the pin number and
0014                         the second cell is used to specify the gpio polarity:
0015                         0 = active high
0016                         1 = active low
0017         - gpio-controller: Marks the device node as a gpio controller.
0018 
0019 Optional properties:
0020         - no-output: GPIOs are read-only.
0021 
0022 Examples:
0023         gpio0: gpio0@e0000000 {
0024                 compatible = "wd,mbl-gpio";
0025                 reg-names = "dat";
0026                 reg = <0xe0000000 0x1>;
0027                 #gpio-cells = <2>;
0028                 gpio-controller;
0029         };
0030 
0031         gpio1: gpio1@e0100000 {
0032                 compatible = "wd,mbl-gpio";
0033                 reg-names = "dat";
0034                 reg = <0xe0100000 0x1>;
0035                 #gpio-cells = <2>;
0036                 gpio-controller;
0037                 no-output;
0038         };