0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: UniPhier GPIO controller
0008
0009 maintainers:
0010 - Masahiro Yamada <yamada.masahiro@socionext.com>
0011
0012 properties:
0013 $nodename:
0014 pattern: "^gpio@[0-9a-f]+$"
0015
0016 compatible:
0017 const: socionext,uniphier-gpio
0018
0019 reg:
0020 maxItems: 1
0021
0022 gpio-controller: true
0023
0024 "#gpio-cells":
0025 const: 2
0026
0027 interrupt-controller: true
0028
0029 "#interrupt-cells":
0030 description: |
0031 The first cell defines the interrupt number.
0032 The second cell bits[3:0] is used to specify trigger type as follows:
0033 1 = low-to-high edge triggered
0034 2 = high-to-low edge triggered
0035 4 = active high level-sensitive
0036 8 = active low level-sensitive
0037 Valid combinations are 1, 2, 3, 4, 8.
0038 const: 2
0039
0040 ngpios:
0041 minimum: 0
0042 maximum: 512
0043
0044 gpio-ranges: true
0045
0046 gpio-ranges-group-names: true
0047
0048 socionext,interrupt-ranges:
0049 description: |
0050 Specifies an interrupt number mapping between this GPIO controller and
0051 its interrupt parent, in the form of arbitrary number of
0052 <child-interrupt-base parent-interrupt-base length> triplets.
0053 $ref: /schemas/types.yaml#/definitions/uint32-matrix
0054
0055 patternProperties:
0056 "^.+-hog(-[0-9]+)?$":
0057 type: object
0058 properties:
0059 gpio-hog: true
0060 gpios: true
0061 input: true
0062 output-high: true
0063 output-low: true
0064 line-name: true
0065
0066 required:
0067 - gpio-hog
0068 - gpios
0069
0070 additionalProperties: false
0071
0072 required:
0073 - compatible
0074 - reg
0075 - gpio-controller
0076 - "#gpio-cells"
0077 - interrupt-controller
0078 - "#interrupt-cells"
0079 - ngpios
0080 - gpio-ranges
0081 - socionext,interrupt-ranges
0082
0083 additionalProperties: false
0084
0085 examples:
0086 - |
0087 #include <dt-bindings/gpio/gpio.h>
0088 #include <dt-bindings/gpio/uniphier-gpio.h>
0089
0090 gpio: gpio@55000000 {
0091 compatible = "socionext,uniphier-gpio";
0092 reg = <0x55000000 0x200>;
0093 interrupt-parent = <&aidet>;
0094 interrupt-controller;
0095 #interrupt-cells = <2>;
0096 gpio-controller;
0097 #gpio-cells = <2>;
0098 gpio-ranges = <&pinctrl 0 0 0>;
0099 gpio-ranges-group-names = "gpio_range";
0100 ngpios = <248>;
0101 socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>;
0102 };
0103
0104 // Consumer:
0105 // Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC
0106 // document. Unfortunately, only the one's place is octal in the port
0107 // numbering. (That is, PORT 8, 9, 18, 19, 28, 29, ... do not exist.)
0108 // UNIPHIER_GPIO_PORT() is a helper macro to calculate 29 * 8 + 4.
0109 sdhci0_pwrseq {
0110 compatible = "mmc-pwrseq-emmc";
0111 reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>;
0112 };
