bindings/gpio/snps%2Cdw-apb-gpio.yaml

0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Synopsys DesignWare APB GPIO controller
0008
0009 description: |
0010   Synopsys DesignWare GPIO controllers have a configurable number of ports,
0011   each of which are intended to be represented as child nodes with the generic
0012   GPIO-controller properties as desribed in this bindings file.
0013
0014 maintainers:
0015   - Hoan Tran <hoan@os.amperecomputing.com>
0016   - Serge Semin <fancer.lancer@gmail.com>
0017
0018 properties:
0019   $nodename:
0020     pattern: "^gpio@[0-9a-f]+$"
0021
0022   compatible:
0023     const: snps,dw-apb-gpio
0024
0025   "#address-cells":
0026     const: 1
0027
0028   "#size-cells":
0029     const: 0
0030
0031   reg:
0032     maxItems: 1
0033
0034   clocks:
0035     minItems: 1
0036     items:
0037       - description: APB interface clock source
0038       - description: DW GPIO debounce reference clock source
0039
0040   clock-names:
0041     minItems: 1
0042     items:
0043       - const: bus
0044       - const: db
0045
0046   resets:
0047     maxItems: 1
0048
0049 patternProperties:
0050   "^gpio-(port|controller)@[0-9a-f]+$":
0051     type: object
0052     properties:
0053       compatible:
0054         const: snps,dw-apb-gpio-port
0055
0056       reg:
0057         maxItems: 1
0058
0059       gpio-controller: true
0060
0061       '#gpio-cells':
0062         const: 2
0063
0064       ngpios:
0065         default: 32
0066         minimum: 1
0067         maximum: 32
0068
0069       snps,nr-gpios:
0070         description: The number of GPIO pins exported by the port.
0071         deprecated: true
0072         $ref: /schemas/types.yaml#/definitions/uint32
0073         default: 32
0074         minimum: 1
0075         maximum: 32
0076
0077       interrupts:
0078         description: |
0079           The interrupts to the parent controller raised when GPIOs generate
0080           the interrupts. If the controller provides one combined interrupt
0081           for all GPIOs, specify a single interrupt. If the controller provides
0082           one interrupt for each GPIO, provide a list of interrupts that
0083           correspond to each of the GPIO pins.
0084         minItems: 1
0085         maxItems: 32
0086
0087       interrupt-controller: true
0088
0089       '#interrupt-cells':
0090         const: 2
0091
0092     required:
0093       - compatible
0094       - reg
0095       - gpio-controller
0096       - '#gpio-cells'
0097
0098     dependencies:
0099       interrupt-controller: [ interrupts ]
0100
0101     additionalProperties: false
0102
0103 additionalProperties: false
0104
0105 required:
0106   - compatible
0107   - reg
0108   - "#address-cells"
0109   - "#size-cells"
0110
0111 examples:
0112   - |
0113     gpio: gpio@20000 {
0114       compatible = "snps,dw-apb-gpio";
0115       reg = <0x20000 0x1000>;
0116       #address-cells = <1>;
0117       #size-cells = <0>;
0118
0119       porta: gpio-port@0 {
0120         compatible = "snps,dw-apb-gpio-port";
0121         reg = <0>;
0122         gpio-controller;
0123         #gpio-cells = <2>;
0124         snps,nr-gpios = <8>;
0125         interrupt-controller;
0126         #interrupt-cells = <2>;
0127         interrupt-parent = <&vic1>;
0128         interrupts = <0>;
0129       };
0130
0131       portb: gpio-port@1 {
0132         compatible = "snps,dw-apb-gpio-port";
0133         reg = <1>;
0134         gpio-controller;
0135         #gpio-cells = <2>;
0136         snps,nr-gpios = <8>;
0137       };
0138     };
0139 ...