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OSCL-LXR

 
 

    


0001 Lantiq SoC External Bus memory mapped GPIO controller
0002 
0003 By attaching hardware latches to the EBU it is possible to create output
0004 only gpios. This driver configures a special memory address, which when
0005 written to outputs 16 bit to the latches.
0006 
0007 The node describing the memory mapped GPIOs needs to be a child of the node
0008 describing the "lantiq,localbus".
0009 
0010 Required properties:
0011 - compatible : Should be "lantiq,gpio-mm-lantiq"
0012 - reg : Address and length of the register set for the device
0013 - #gpio-cells : Should be two.  The first cell is the pin number and
0014   the second cell is used to specify optional parameters (currently
0015   unused).
0016 - gpio-controller : Marks the device node as a gpio controller.
0017 
0018 Optional properties:
0019 - lantiq,shadow : The default value that we shall assume as already set on the
0020   shift register cascade.
0021 
0022 Example:
0023 
0024 localbus@0 {
0025         #address-cells = <2>;
0026         #size-cells = <1>;
0027         ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
0028                 1 0 0x4000000 0x4000010>; /* addsel1 */
0029         compatible = "lantiq,localbus", "simple-bus";
0030 
0031         gpio_mm0: gpio@4000000 {
0032                 compatible = "lantiq,gpio-mm";
0033                 reg = <1 0x0 0x10>;
0034                 gpio-controller;
0035                 #gpio-cells = <2>;
0036                 lantiq,shadow = <0x77f>
0037         };
0038 }