0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/gpio/gpio-davinci.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: GPIO controller for Davinci and keystone devices
0008
0009 maintainers:
0010 - Keerthy <j-keerthy@ti.com>
0011
0012 properties:
0013 compatible:
0014 oneOf:
0015 - items:
0016 - enum:
0017 - ti,k2g-gpio
0018 - ti,am654-gpio
0019 - ti,j721e-gpio
0020 - ti,am64-gpio
0021 - const: ti,keystone-gpio
0022
0023 - items:
0024 - enum:
0025 - ti,dm6441-gpio
0026 - ti,keystone-gpio
0027
0028 reg:
0029 maxItems: 1
0030
0031 gpio-controller: true
0032
0033 gpio-ranges: true
0034
0035 gpio-line-names:
0036 description: strings describing the names of each gpio line.
0037 minItems: 1
0038 maxItems: 100
0039
0040 "#gpio-cells":
0041 const: 2
0042 description:
0043 first cell is the pin number and second cell is used to specify optional parameters (unused).
0044
0045 interrupts:
0046 description:
0047 The interrupts are specified as per the interrupt parent. Only banked
0048 or unbanked IRQs are supported at a time. If the interrupts are
0049 banked then provide list of interrupts corresponding to each bank, else
0050 provide the list of interrupts for each gpio.
0051 minItems: 1
0052 maxItems: 100
0053
0054 ti,ngpio:
0055 $ref: /schemas/types.yaml#/definitions/uint32
0056 description: The number of GPIO pins supported consecutively.
0057 minimum: 1
0058
0059 ti,davinci-gpio-unbanked:
0060 $ref: /schemas/types.yaml#/definitions/uint32
0061 description: The number of GPIOs that have an individual interrupt line to processor.
0062 minimum: 0
0063
0064 clocks:
0065 maxItems: 1
0066
0067 clock-names:
0068 const: gpio
0069
0070 interrupt-controller: true
0071
0072 power-domains:
0073 maxItems: 1
0074
0075 "#interrupt-cells":
0076 const: 2
0077
0078 patternProperties:
0079 "^(.+-hog(-[0-9]+)?)$":
0080 type: object
0081
0082 required:
0083 - gpio-hog
0084
0085 required:
0086 - compatible
0087 - reg
0088 - gpio-controller
0089 - "#gpio-cells"
0090 - interrupts
0091 - ti,ngpio
0092 - ti,davinci-gpio-unbanked
0093 - clocks
0094 - clock-names
0095
0096 additionalProperties: false
0097
0098 examples:
0099 - |
0100 #include<dt-bindings/interrupt-controller/arm-gic.h>
0101
0102 gpio0: gpio@2603000 {
0103 compatible = "ti,k2g-gpio", "ti,keystone-gpio";
0104 reg = <0x02603000 0x100>;
0105 gpio-controller;
0106 #gpio-cells = <2>;
0107 interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
0108 <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
0109 <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
0110 <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
0111 <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
0112 <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
0113 <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
0114 <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
0115 <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
0116 interrupt-controller;
0117 #interrupt-cells = <2>;
0118 ti,ngpio = <144>;
0119 ti,davinci-gpio-unbanked = <0>;
0120 clocks = <&k2g_clks 0x001b 0x0>;
0121 clock-names = "gpio";
0122 };
0123
0124 - |
0125 #include<dt-bindings/interrupt-controller/arm-gic.h>
0126
0127 gpio1: gpio@260bf00 {
0128 compatible = "ti,keystone-gpio";
0129 reg = <0x0260bf00 0x100>;
0130 gpio-controller;
0131 #gpio-cells = <2>;
0132 /* HW Interrupts mapped to GPIO pins */
0133 interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
0134 <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
0135 <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
0136 <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
0137 <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
0138 <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
0139 <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
0140 <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
0141 <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
0142 <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
0143 <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
0144 <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
0145 <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
0146 <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
0147 <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
0148 <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
0149 <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
0150 <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
0151 <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
0152 <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
0153 <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
0154 <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
0155 <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
0156 <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
0157 <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
0158 <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
0159 <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
0160 <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
0161 <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
0162 <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
0163 <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
0164 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
0165 clocks = <&clkgpio>;
0166 clock-names = "gpio";
0167 ti,ngpio = <32>;
0168 ti,davinci-gpio-unbanked = <32>;
0169 };
0170
0171 - |
0172 wkup_gpio0: gpio0@42110000 {
0173 compatible = "ti,am654-gpio", "ti,keystone-gpio";
0174 reg = <0x42110000 0x100>;
0175 gpio-controller;
0176 #gpio-cells = <2>;
0177 interrupt-parent = <&intr_wkup_gpio>;
0178 interrupts = <60>, <61>, <62>, <63>;
0179 interrupt-controller;
0180 #interrupt-cells = <2>;
0181 ti,ngpio = <56>;
0182 ti,davinci-gpio-unbanked = <0>;
0183 clocks = <&k3_clks 59 0>;
0184 clock-names = "gpio";
0185 };
