0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Aspeed SGPIO controller
0008
0009 maintainers:
0010 - Andrew Jeffery <andrew@aj.id.au>
0011
0012 description:
0013 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
0014 AST2600 have two sgpio master one with 128 pins another one with 80 pins,
0015 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
0016 GPIO pins can be programmed to support the following options
0017 - Support interrupt option for each input port and various interrupt
0018 sensitivity option (level-high, level-low, edge-high, edge-low)
0019 - Support reset tolerance option for each output port
0020 - Directly connected to APB bus and its shift clock is from APB bus clock
0021 divided by a programmable value.
0022 - Co-work with external signal-chained TTL components (74LV165/74LV595)
0023
0024 properties:
0025 compatible:
0026 enum:
0027 - aspeed,ast2400-sgpio
0028 - aspeed,ast2500-sgpio
0029 - aspeed,ast2600-sgpiom
0030
0031 reg:
0032 maxItems: 1
0033
0034 gpio-controller: true
0035
0036 '#gpio-cells':
0037 const: 2
0038
0039 interrupts:
0040 maxItems: 1
0041
0042 interrupt-controller: true
0043
0044 clocks:
0045 maxItems: 1
0046
0047 ngpios: true
0048
0049 bus-frequency: true
0050
0051 required:
0052 - compatible
0053 - reg
0054 - gpio-controller
0055 - '#gpio-cells'
0056 - interrupts
0057 - interrupt-controller
0058 - ngpios
0059 - clocks
0060 - bus-frequency
0061
0062 additionalProperties: false
0063
0064 examples:
0065 - |
0066 #include <dt-bindings/clock/aspeed-clock.h>
0067 sgpio: sgpio@1e780200 {
0068 #gpio-cells = <2>;
0069 compatible = "aspeed,ast2500-sgpio";
0070 gpio-controller;
0071 interrupts = <40>;
0072 reg = <0x1e780200 0x0100>;
0073 clocks = <&syscon ASPEED_CLK_APB>;
0074 interrupt-controller;
0075 ngpios = <80>;
0076 bus-frequency = <12000000>;
0077 };
