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0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 # Copyright 2019 Linaro Ltd.
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007 
0008 title: Intel IXP4xx Network Processing Engine
0009 
0010 maintainers:
0011   - Linus Walleij <linus.walleij@linaro.org>
0012 
0013 description: |
0014   On the IXP4xx SoCs, the Network Processing Engine (NPE) is a small
0015   processor that can load a firmware to perform offloading of networking
0016   and crypto tasks. It also manages the MDIO bus to the ethernet PHYs
0017   on the IXP4xx platform. All IXP4xx platforms have three NPEs at
0018   consecutive memory locations. They are all included in the same
0019   device node since they are not independent of each other.
0020 
0021 properties:
0022   compatible:
0023     oneOf:
0024       - items:
0025           - const: intel,ixp4xx-network-processing-engine
0026 
0027   reg:
0028     items:
0029       - description: NPE0 (NPE-A) register range
0030       - description: NPE1 (NPE-B) register range
0031       - description: NPE2 (NPE-C) register range
0032 
0033   crypto:
0034     $ref: /schemas/crypto/intel,ixp4xx-crypto.yaml#
0035     type: object
0036     description: Optional node for the embedded crypto engine, the node
0037       should be named with the instance number of the NPE engine used for
0038       the crypto engine.
0039 
0040   "#address-cells":
0041     const: 1
0042 
0043   "#size-cells":
0044     const: 0
0045 
0046 patternProperties:
0047   hss@[0-9]+$:
0048     $ref: /schemas/net/intel,ixp4xx-hss.yaml#
0049     type: object
0050     description: Optional node for the High Speed Serial link (HSS), the
0051       node should be named with the instance number of the NPE engine
0052       used for the HSS.
0053 
0054 required:
0055   - compatible
0056   - reg
0057 
0058 additionalProperties: false
0059 
0060 examples:
0061   - |
0062     #include <dt-bindings/gpio/gpio.h>
0063 
0064     npe: npe@c8006000 {
0065          compatible = "intel,ixp4xx-network-processing-engine";
0066          reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;
0067          #address-cells = <1>;
0068          #size-cells = <0>;
0069 
0070          hss@0 {
0071              compatible = "intel,ixp4xx-hss";
0072              reg = <0>;
0073              intel,npe-handle = <&npe 0>;
0074              intel,queue-chl-rxtrig = <&qmgr 12>;
0075              intel,queue-chl-txready = <&qmgr 34>;
0076              intel,queue-pkt-rx = <&qmgr 13>;
0077              intel,queue-pkt-tx = <&qmgr 14>, <&qmgr 15>, <&qmgr 16>, <&qmgr 17>;
0078              intel,queue-pkt-rxfree = <&qmgr 18>, <&qmgr 19>, <&qmgr 20>, <&qmgr 21>;
0079              intel,queue-pkt-txdone = <&qmgr 22>;
0080              cts-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
0081              rts-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
0082              dcd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
0083              dtr-gpios = <&gpio_74 2 GPIO_ACTIVE_LOW>;
0084              clk-internal-gpios = <&gpio_74 0 GPIO_ACTIVE_HIGH>;
0085          };
0086 
0087          crypto {
0088              compatible = "intel,ixp4xx-crypto";
0089              intel,npe-handle = <&npe 2>;
0090              queue-rx = <&qmgr 30>;
0091              queue-txready = <&qmgr 29>;
0092          };
0093     };
0094 ...