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OSCL-LXR

 
 

    


0001 COREBOOT firmware information
0002 
0003 The device tree node to communicate the location of coreboot's memory-resident
0004 bookkeeping structures to the kernel. Since coreboot itself cannot boot a
0005 device-tree-based kernel (yet), this node needs to be inserted by a
0006 second-stage bootloader (a coreboot "payload").
0007 
0008 Required properties:
0009  - compatible: Should be "coreboot"
0010  - reg: Address and length of the following two memory regions, in order:
0011         1.) The coreboot table. This is a list of variable-sized descriptors
0012         that contain various compile- and run-time generated firmware
0013         parameters. It is identified by the magic string "LBIO" in its first
0014         four bytes.
0015         See coreboot's src/commonlib/include/commonlib/coreboot_tables.h for
0016         details.
0017         2.) The CBMEM area. This is a downward-growing memory region used by
0018         coreboot to dynamically allocate data structures that remain resident.
0019         It may or may not include the coreboot table as one of its members. It
0020         is identified by a root node descriptor with the magic number
0021         0xc0389481 that resides in the topmost 8 bytes of the area.
0022         See coreboot's src/include/imd.h for details.
0023 
0024 Example:
0025         firmware {
0026                 ranges;
0027 
0028                 coreboot {
0029                         compatible = "coreboot";
0030                         reg = <0xfdfea000 0x264>,
0031                               <0xfdfea000 0x16000>;
0032                 }
0033         };