0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/dvfs/performance-domain.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Generic performance domains
0008
0009 maintainers:
0010 - Sudeep Holla <sudeep.holla@arm.com>
0011
0012 description: |+
0013 This binding is intended for performance management of groups of devices or
0014 CPUs that run in the same performance domain. Performance domains must not
0015 be confused with power domains. A performance domain is defined by a set
0016 of devices that always have to run at the same performance level. For a given
0017 performance domain, there is a single point of control that affects all the
0018 devices in the domain, making it impossible to set the performance level of
0019 an individual device in the domain independently from other devices in
0020 that domain. For example, a set of CPUs that share a voltage domain, and
0021 have a common frequency control, is said to be in the same performance
0022 domain.
0023
0024 This device tree binding can be used to bind performance domain consumer
0025 devices with their performance domains provided by performance domain
0026 providers. A performance domain provider can be represented by any node in
0027 the device tree and can provide one or more performance domains. A consumer
0028 node can refer to the provider by a phandle and a set of phandle arguments
0029 (so called performance domain specifiers) of length specified by the
0030 \#performance-domain-cells property in the performance domain provider node.
0031
0032 select: true
0033
0034 properties:
0035 "#performance-domain-cells":
0036 description:
0037 Number of cells in a performance domain specifier. Typically 0 for nodes
0038 representing a single performance domain and 1 for nodes providing
0039 multiple performance domains (e.g. performance controllers), but can be
0040 any value as specified by device tree binding documentation of particular
0041 provider.
0042 enum: [ 0, 1 ]
0043
0044 performance-domains:
0045 $ref: '/schemas/types.yaml#/definitions/phandle-array'
0046 description:
0047 A phandle and performance domain specifier as defined by bindings of the
0048 performance controller/provider specified by phandle.
0049
0050 additionalProperties: true
0051
0052 examples:
0053 - |
0054 soc {
0055 #address-cells = <2>;
0056 #size-cells = <2>;
0057
0058 performance: performance-controller@11bc00 {
0059 compatible = "mediatek,cpufreq-hw";
0060 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
0061
0062 #performance-domain-cells = <1>;
0063 };
0064 };
0065
0066 // The node above defines a performance controller that is a performance
0067 // domain provider and expects one cell as its phandle argument.
0068
0069 cpus {
0070 #address-cells = <2>;
0071 #size-cells = <0>;
0072
0073 cpu@0 {
0074 device_type = "cpu";
0075 compatible = "arm,cortex-a57";
0076 reg = <0x0 0x0>;
0077 performance-domains = <&performance 1>;
0078 };
0079 };
