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0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: MediaTek mt8186 DSP core
0008 
0009 maintainers:
0010   - Tinghan Shen <tinghan.shen@mediatek.com>
0011 
0012 description: |
0013   MediaTek mt8186 SoC contains a DSP core used for
0014   advanced pre- and post- audio processing.
0015 
0016 properties:
0017   compatible:
0018     const: mediatek,mt8186-dsp
0019 
0020   reg:
0021     items:
0022       - description: Address and size of the DSP config registers
0023       - description: Address and size of the DSP SRAM
0024       - description: Address and size of the DSP secure registers
0025       - description: Address and size of the DSP bus registers
0026 
0027   reg-names:
0028     items:
0029       - const: cfg
0030       - const: sram
0031       - const: sec
0032       - const: bus
0033 
0034   clocks:
0035     items:
0036       - description: mux for audio dsp clock
0037       - description: mux for audio dsp local bus
0038 
0039   clock-names:
0040     items:
0041       - const: audiodsp
0042       - const: adsp_bus
0043 
0044   power-domains:
0045     maxItems: 1
0046 
0047   mboxes:
0048     items:
0049       - description: mailbox for receiving audio DSP requests.
0050       - description: mailbox for transmitting requests to audio DSP.
0051 
0052   mbox-names:
0053     items:
0054       - const: rx
0055       - const: tx
0056 
0057   memory-region:
0058     items:
0059       - description: dma buffer between host and DSP.
0060       - description: DSP system memory.
0061 
0062 required:
0063   - compatible
0064   - reg
0065   - reg-names
0066   - clocks
0067   - clock-names
0068   - power-domains
0069   - mbox-names
0070   - mboxes
0071 
0072 additionalProperties: false
0073 
0074 examples:
0075   - |
0076     #include <dt-bindings/clock/mt8186-clk.h>
0077     dsp@10680000 {
0078         compatible = "mediatek,mt8186-dsp";
0079         reg = <0x10680000 0x2000>,
0080               <0x10800000 0x100000>,
0081               <0x1068b000 0x100>,
0082               <0x1068f000 0x1000>;
0083         reg-names = "cfg", "sram", "sec", "bus";
0084         clocks = <&topckgen CLK_TOP_AUDIODSP>,
0085                  <&topckgen CLK_TOP_ADSP_BUS>;
0086         clock-names = "audiodsp",
0087                       "adsp_bus";
0088         power-domains = <&spm 6>;
0089         mbox-names = "rx", "tx";
0090         mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
0091     };