0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (C) 2020 Texas Instruments Incorporated
0003 # Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
0004 %YAML 1.2
0005 ---
0006 $id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml#
0007 $schema: http://devicetree.org/meta-schemas/core.yaml#
0008
0009 title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings
0010
0011 maintainers:
0012 - Peter Ujfalusi <peter.ujfalusi@gmail.com>
0013
0014 description: |
0015 The Packet DMA (PKTDMA) is intended to perform similar functions as the packet
0016 mode channels of K3 UDMA-P.
0017 PKTDMA only includes Split channels to service PSI-L based peripherals.
0018
0019 The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
0020 with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
0021 legacy peripheral.
0022
0023 PDMAs can be configured via PKTDMA split channel's peer registers to match
0024 with the configuration of the legacy peripheral.
0025
0026 allOf:
0027 - $ref: /schemas/dma/dma-controller.yaml#
0028 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
0029
0030 properties:
0031 compatible:
0032 const: ti,am64-dmss-pktdma
0033
0034 "#dma-cells":
0035 const: 2
0036 description: |
0037 The first cell is the PSI-L thread ID of the remote (to PKTDMA) end.
0038 Valid ranges for thread ID depends on the data movement direction:
0039 for source thread IDs (rx): 0 - 0x7fff
0040 for destination thread IDs (tx): 0x8000 - 0xffff
0041
0042 Please refer to the device documentation for the PSI-L thread map and also
0043 the PSI-L peripheral chapter for the correct thread ID.
0044
0045 The second cell is the ASEL value for the channel
0046
0047 reg:
0048 maxItems: 4
0049
0050 reg-names:
0051 items:
0052 - const: gcfg
0053 - const: rchanrt
0054 - const: tchanrt
0055 - const: ringrt
0056
0057 msi-parent: true
0058
0059 ti,sci-rm-range-tchan:
0060 $ref: /schemas/types.yaml#/definitions/uint32-array
0061 description: |
0062 Array of PKTDMA split tx channel resource subtypes for resource allocation
0063 for this host
0064 minItems: 1
0065 # Should be enough
0066 maxItems: 255
0067 items:
0068 maximum: 0x3f
0069
0070 ti,sci-rm-range-tflow:
0071 $ref: /schemas/types.yaml#/definitions/uint32-array
0072 description: |
0073 Array of PKTDMA split tx flow resource subtypes for resource allocation
0074 for this host
0075 minItems: 1
0076 # Should be enough
0077 maxItems: 255
0078 items:
0079 maximum: 0x3f
0080
0081 ti,sci-rm-range-rchan:
0082 $ref: /schemas/types.yaml#/definitions/uint32-array
0083 description: |
0084 Array of PKTDMA split rx channel resource subtypes for resource allocation
0085 for this host
0086 minItems: 1
0087 # Should be enough
0088 maxItems: 255
0089 items:
0090 maximum: 0x3f
0091
0092 ti,sci-rm-range-rflow:
0093 $ref: /schemas/types.yaml#/definitions/uint32-array
0094 description: |
0095 Array of PKTDMA split rx flow resource subtypes for resource allocation
0096 for this host
0097 minItems: 1
0098 # Should be enough
0099 maxItems: 255
0100 items:
0101 maximum: 0x3f
0102
0103 required:
0104 - compatible
0105 - "#dma-cells"
0106 - reg
0107 - reg-names
0108 - msi-parent
0109 - ti,sci
0110 - ti,sci-dev-id
0111 - ti,sci-rm-range-tchan
0112 - ti,sci-rm-range-tflow
0113 - ti,sci-rm-range-rchan
0114 - ti,sci-rm-range-rflow
0115
0116 unevaluatedProperties: false
0117
0118 examples:
0119 - |+
0120 cbass_main {
0121 #address-cells = <2>;
0122 #size-cells = <2>;
0123
0124 main_dmss {
0125 compatible = "simple-mfd";
0126 #address-cells = <2>;
0127 #size-cells = <2>;
0128 dma-ranges;
0129 ranges;
0130
0131 ti,sci-dev-id = <25>;
0132
0133 main_pktdma: dma-controller@485c0000 {
0134 compatible = "ti,am64-dmss-pktdma";
0135
0136 reg = <0x0 0x485c0000 0x0 0x100>,
0137 <0x0 0x4a800000 0x0 0x20000>,
0138 <0x0 0x4aa00000 0x0 0x40000>,
0139 <0x0 0x4b800000 0x0 0x400000>;
0140 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
0141 msi-parent = <&inta_main_dmss>;
0142 #dma-cells = <2>;
0143
0144 ti,sci = <&dmsc>;
0145 ti,sci-dev-id = <30>;
0146
0147 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
0148 <0x24>, /* CPSW_TX_CHAN */
0149 <0x25>, /* SAUL_TX_0_CHAN */
0150 <0x26>, /* SAUL_TX_1_CHAN */
0151 <0x27>, /* ICSSG_0_TX_CHAN */
0152 <0x28>; /* ICSSG_1_TX_CHAN */
0153 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
0154 <0x11>, /* RING_CPSW_TX_CHAN */
0155 <0x12>, /* RING_SAUL_TX_0_CHAN */
0156 <0x13>, /* RING_SAUL_TX_1_CHAN */
0157 <0x14>, /* RING_ICSSG_0_TX_CHAN */
0158 <0x15>; /* RING_ICSSG_1_TX_CHAN */
0159 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
0160 <0x2b>, /* CPSW_RX_CHAN */
0161 <0x2d>, /* SAUL_RX_0_CHAN */
0162 <0x2f>, /* SAUL_RX_1_CHAN */
0163 <0x31>, /* SAUL_RX_2_CHAN */
0164 <0x33>, /* SAUL_RX_3_CHAN */
0165 <0x35>, /* ICSSG_0_RX_CHAN */
0166 <0x37>; /* ICSSG_1_RX_CHAN */
0167 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
0168 <0x2c>, /* FLOW_CPSW_RX_CHAN */
0169 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
0170 <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */
0171 <0x36>, /* FLOW_ICSSG_0_RX_CHAN */
0172 <0x38>; /* FLOW_ICSSG_1_RX_CHAN */
0173 };
0174 };
0175 };
