0001 * STMicroelectronics Flexible Direct Memory Access Device Tree bindings
0002
0003 The FDMA is a general-purpose direct memory access controller capable of
0004 supporting 16 independent DMA channels. It accepts up to 32 DMA requests.
0005 The FDMA is based on a Slim processor which requires a firmware.
0006
0007 * FDMA Controller
0008
0009 Required properties:
0010 - compatible : Should be one of
0011 - st,stih407-fdma-mpe31-11, "st,slim-rproc";
0012 - st,stih407-fdma-mpe31-12, "st,slim-rproc";
0013 - st,stih407-fdma-mpe31-13, "st,slim-rproc";
0014 - reg : Should contain an entry for each name in reg-names
0015 - reg-names : Must contain "slimcore", "dmem", "peripherals", "imem" entries
0016 - interrupts : Should contain one interrupt shared by all channels
0017 - dma-channels : Number of channels supported by the controller
0018 - #dma-cells : Must be <3>. See DMA client section below
0019 - clocks : Must contain an entry for each clock
0020 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
0021
0022
0023 Example:
0024
0025 fdma0: dma-controller@8e20000 {
0026 compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc";
0027 reg = <0x8e20000 0x8000>,
0028 <0x8e30000 0x3000>,
0029 <0x8e37000 0x1000>,
0030 <0x8e38000 0x8000>;
0031 reg-names = "slimcore", "dmem", "peripherals", "imem";
0032 clocks = <&clk_s_c0_flexgen CLK_FDMA>,
0033 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
0034 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
0035 <&clk_s_c0_flexgen CLK_EXT2F_A9>;
0036 interrupts = <GIC_SPI 5 IRQ_TYPE_NONE>;
0037 dma-channels = <16>;
0038 #dma-cells = <3>;
0039 };
0040
0041 * DMA client
0042
0043 Required properties:
0044 - dmas: Comma separated list of dma channel requests
0045 - dma-names: Names of the aforementioned requested channels
0046
0047 Each dmas request consists of 4 cells:
0048 1. A phandle pointing to the FDMA controller
0049 2. The request line number
0050 3. A 32bit mask specifying (see include/linux/platform_data/dma-st-fdma.h)
0051 -bit 2-0: Holdoff value, dreq will be masked for
0052 0x0: 0-0.5us
0053 0x1: 0.5-1us
0054 0x2: 1-1.5us
0055 -bit 17: data swap
0056 0x0: disabled
0057 0x1: enabled
0058 -bit 21: Increment Address
0059 0x0: no address increment between transfers
0060 0x1: increment address between transfers
0061 -bit 22: 2 STBus Initiator Coprocessor interface
0062 0x0: high priority port
0063 0x1: low priority port
0064 4. transfers type
0065 0 free running
0066 1 paced
0067
0068 Example:
0069
0070 sti_uni_player2: sti-uni-player@2 {
0071 compatible = "st,sti-uni-player";
0072 #sound-dai-cells = <0>;
0073 st,syscfg = <&syscfg_core>;
0074 clocks = <&clk_s_d0_flexgen CLK_PCM_2>;
0075 assigned-clocks = <&clk_s_d0_flexgen CLK_PCM_2>;
0076 assigned-clock-parents = <&clk_s_d0_quadfs 2>;
0077 assigned-clock-rates = <50000000>;
0078 reg = <0x8D82000 0x158>;
0079 interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
0080 dmas = <&fdma0 4 0 1>;
0081 dai-name = "Uni Player #1 (DAC)";
0082 dma-names = "tx";
0083 st,uniperiph-id = <2>;
0084 st,version = <5>;
0085 st,mode = "PCM";
0086 };
