0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/dma/socionext,uniphier-xdmac.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Socionext UniPhier external DMA controller
0008
0009 description: |
0010 This describes the devicetree bindings for an external DMA engine to perform
0011 memory-to-memory or peripheral-to-memory data transfer capable of supporting
0012 16 channels, implemented in Socionext UniPhier SoCs.
0013
0014 maintainers:
0015 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
0016
0017 allOf:
0018 - $ref: "dma-controller.yaml#"
0019
0020 properties:
0021 compatible:
0022 const: socionext,uniphier-xdmac
0023
0024 reg:
0025 maxItems: 1
0026
0027 interrupts:
0028 maxItems: 1
0029
0030 "#dma-cells":
0031 const: 2
0032 description: |
0033 DMA request from clients consists of 2 cells:
0034 1. Channel index
0035 2. Transfer request factor number, If no transfer factor, use 0.
0036 The number is SoC-specific, and this should be specified with
0037 relation to the device to use the DMA controller.
0038
0039 dma-channels:
0040 minimum: 1
0041 maximum: 16
0042
0043 additionalProperties: false
0044
0045 required:
0046 - compatible
0047 - reg
0048 - interrupts
0049 - "#dma-cells"
0050 - dma-channels
0051
0052 examples:
0053 - |
0054 xdmac: dma-controller@5fc10000 {
0055 compatible = "socionext,uniphier-xdmac";
0056 reg = <0x5fc10000 0x5300>;
0057 interrupts = <0 188 4>;
0058 #dma-cells = <2>;
0059 dma-channels = <16>;
0060 };
0061
0062 ...
