0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm Technologies Inc GPI DMA controller
0008
0009 maintainers:
0010 - Vinod Koul <vkoul@kernel.org>
0011
0012 description: |
0013 QCOM GPI DMA controller provides DMA capabilities for
0014 peripheral buses such as I2C, UART, and SPI.
0015
0016 allOf:
0017 - $ref: "dma-controller.yaml#"
0018
0019 properties:
0020 compatible:
0021 enum:
0022 - qcom,sc7280-gpi-dma
0023 - qcom,sdm845-gpi-dma
0024 - qcom,sm8150-gpi-dma
0025 - qcom,sm8250-gpi-dma
0026 - qcom,sm8350-gpi-dma
0027 - qcom,sm8450-gpi-dma
0028
0029 reg:
0030 maxItems: 1
0031
0032 interrupts:
0033 description:
0034 Interrupt lines for each GPI instance
0035 minItems: 1
0036 maxItems: 13
0037
0038 "#dma-cells":
0039 const: 3
0040 description: >
0041 DMA clients must use the format described in dma.txt, giving a phandle
0042 to the DMA controller plus the following 3 integer cells:
0043 - channel: if set to 0xffffffff, any available channel will be allocated
0044 for the client. Otherwise, the exact channel specified will be used.
0045 - seid: serial id of the client as defined in the SoC documentation.
0046 - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
0047
0048 iommus:
0049 maxItems: 1
0050
0051 dma-channels:
0052 maximum: 31
0053
0054 dma-channel-mask:
0055 maxItems: 1
0056
0057 required:
0058 - compatible
0059 - reg
0060 - interrupts
0061 - "#dma-cells"
0062 - iommus
0063 - dma-channels
0064 - dma-channel-mask
0065
0066 additionalProperties: false
0067
0068 examples:
0069 - |
0070 #include <dt-bindings/interrupt-controller/arm-gic.h>
0071 #include <dt-bindings/dma/qcom-gpi.h>
0072 gpi_dma0: dma-controller@800000 {
0073 compatible = "qcom,sdm845-gpi-dma";
0074 #dma-cells = <3>;
0075 reg = <0x00800000 0x60000>;
0076 iommus = <&apps_smmu 0x0016 0x0>;
0077 dma-channels = <13>;
0078 dma-channel-mask = <0xfa>;
0079 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
0080 <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
0081 <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
0082 <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
0083 <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
0084 <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
0085 <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
0086 <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
0087 <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
0088 <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
0089 <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
0090 <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
0091 <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
0092 };
0093
0094 ...
