0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/dma/owl-dma.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Actions Semi Owl SoCs DMA controller
0008
0009 description: |
0010 The OWL DMA is a general-purpose direct memory access controller capable of
0011 supporting 10 independent DMA channels for the Actions Semi S700 SoC and 12
0012 independent DMA channels for the S500 and S900 SoC variants.
0013
0014 maintainers:
0015 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
0016
0017 allOf:
0018 - $ref: "dma-controller.yaml#"
0019
0020 properties:
0021 compatible:
0022 enum:
0023 - actions,s500-dma
0024 - actions,s700-dma
0025 - actions,s900-dma
0026
0027 reg:
0028 maxItems: 1
0029
0030 interrupts:
0031 description:
0032 controller supports 4 interrupts, which are freely assignable to the
0033 DMA channels.
0034 maxItems: 4
0035
0036 "#dma-cells":
0037 const: 1
0038
0039 dma-channels:
0040 maximum: 12
0041
0042 dma-requests:
0043 maximum: 46
0044
0045 clocks:
0046 maxItems: 1
0047 description:
0048 Phandle and Specifier of the clock feeding the DMA controller.
0049
0050 power-domains:
0051 maxItems: 1
0052
0053 required:
0054 - compatible
0055 - reg
0056 - interrupts
0057 - "#dma-cells"
0058 - dma-channels
0059 - dma-requests
0060 - clocks
0061
0062 unevaluatedProperties: false
0063
0064 examples:
0065 - |
0066 #include <dt-bindings/interrupt-controller/arm-gic.h>
0067 dma: dma-controller@e0260000 {
0068 compatible = "actions,s900-dma";
0069 reg = <0xe0260000 0x1000>;
0070 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
0071 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
0072 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
0073 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
0074 #dma-cells = <1>;
0075 dma-channels = <12>;
0076 dma-requests = <46>;
0077 clocks = <&clock 22>;
0078 };
0079
0080 ...
