0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NVIDIA Tegra Audio DMA (ADMA) controller
0008
0009 description: |
0010 The Tegra Audio DMA controller is used for transferring data
0011 between system memory and the Audio Processing Engine (APE).
0012
0013 maintainers:
0014 - Jon Hunter <jonathanh@nvidia.com>
0015
0016 allOf:
0017 - $ref: "dma-controller.yaml#"
0018
0019 properties:
0020 compatible:
0021 oneOf:
0022 - enum:
0023 - nvidia,tegra210-adma
0024 - nvidia,tegra186-adma
0025 - items:
0026 - enum:
0027 - nvidia,tegra234-adma
0028 - nvidia,tegra194-adma
0029 - const: nvidia,tegra186-adma
0030
0031 reg:
0032 maxItems: 1
0033
0034 interrupts:
0035 description: |
0036 Should contain all of the per-channel DMA interrupts in
0037 ascending order with respect to the DMA channel index.
0038 minItems: 1
0039 maxItems: 32
0040
0041 clocks:
0042 description: Must contain one entry for the ADMA module clock
0043 maxItems: 1
0044
0045 clock-names:
0046 const: d_audio
0047
0048 "#dma-cells":
0049 description: |
0050 The first cell denotes the receive/transmit request number and
0051 should be between 1 and the maximum number of requests supported.
0052 This value corresponds to the RX/TX_REQUEST_SELECT fields in the
0053 ADMA_CHn_CTRL register.
0054 const: 1
0055
0056 required:
0057 - compatible
0058 - reg
0059 - interrupts
0060 - clocks
0061 - clock-names
0062
0063 additionalProperties: false
0064
0065 examples:
0066 - |
0067 #include <dt-bindings/interrupt-controller/arm-gic.h>
0068 #include<dt-bindings/clock/tegra210-car.h>
0069
0070 dma-controller@702e2000 {
0071 compatible = "nvidia,tegra210-adma";
0072 reg = <0x702e2000 0x2000>;
0073 interrupt-parent = <&tegra_agic>;
0074 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
0075 <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
0076 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
0077 <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
0078 <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
0079 <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
0080 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
0081 <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
0082 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
0083 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
0084 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
0085 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
0086 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
0087 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
0088 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
0089 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
0090 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
0091 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
0092 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
0093 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
0094 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
0095 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
0096 clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
0097 clock-names = "d_audio";
0098 #dma-cells = <1>;
0099 };
0100
0101 ...
