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OSCL-LXR

 
 

    


0001 * Milbeaut AHB DMA Controller
0002 
0003 Milbeaut AHB DMA controller has transfer capability below.
0004  - device to memory transfer
0005  - memory to device transfer
0006 
0007 Required property:
0008 - compatible:       Should be  "socionext,milbeaut-m10v-hdmac"
0009 - reg:              Should contain DMA registers location and length.
0010 - interrupts:       Should contain all of the per-channel DMA interrupts.
0011                      Number of channels is configurable - 2, 4 or 8, so
0012                      the number of interrupts specified should be {2,4,8}.
0013 - #dma-cells:       Should be 1. Specify the ID of the slave.
0014 - clocks:           Phandle to the clock used by the HDMAC module.
0015 
0016 
0017 Example:
0018 
0019         hdmac1: dma-controller@1e110000 {
0020                 compatible = "socionext,milbeaut-m10v-hdmac";
0021                 reg = <0x1e110000 0x10000>;
0022                 interrupts = <0 132 4>,
0023                              <0 133 4>,
0024                              <0 134 4>,
0025                              <0 135 4>,
0026                              <0 136 4>,
0027                              <0 137 4>,
0028                              <0 138 4>,
0029                              <0 139 4>;
0030                 #dma-cells = <1>;
0031                 clocks = <&dummy_clk>;
0032         };