bindings/dma/ingenic%2Cdma.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Ingenic SoCs DMA Controller DT bindings
0008
0009 maintainers:
0010   - Paul Cercueil <paul@crapouillou.net>
0011
0012 allOf:
0013   - $ref: "dma-controller.yaml#"
0014
0015 properties:
0016   compatible:
0017     oneOf:
0018       - enum:
0019           - ingenic,jz4740-dma
0020           - ingenic,jz4725b-dma
0021           - ingenic,jz4760-dma
0022           - ingenic,jz4760-bdma
0023           - ingenic,jz4760-mdma
0024           - ingenic,jz4760b-dma
0025           - ingenic,jz4760b-bdma
0026           - ingenic,jz4760b-mdma
0027           - ingenic,jz4770-dma
0028           - ingenic,jz4780-dma
0029           - ingenic,x1000-dma
0030           - ingenic,x1830-dma
0031       - items:
0032           - const: ingenic,jz4770-bdma
0033           - const: ingenic,jz4760b-bdma
0034
0035   reg:
0036     items:
0037       - description: Channel-specific registers
0038       - description: System control registers
0039
0040   interrupts:
0041     maxItems: 1
0042
0043   clocks:
0044     maxItems: 1
0045
0046   "#dma-cells":
0047     enum: [2, 3]
0048     description: >
0049       DMA clients must use the format described in dma.txt, giving a phandle
0050       to the DMA controller plus the following integer cells:
0051
0052       - Request type: The DMA request type specifies the device endpoint that
0053         will be the source or destination of the DMA transfer.
0054         If "#dma-cells" is 2, the request type is a single cell, and the
0055         direction will be unidirectional (either RX or TX but not both).
0056         If "#dma-cells" is 3, the request type has two cells; the first
0057         one corresponds to the host to device direction (TX), the second one
0058         corresponds to the device to host direction (RX). The DMA channel is
0059         then bidirectional.
0060
0061       - Channel: If set to 0xffffffff, any available channel will be allocated
0062         for the client. Otherwise, the exact channel specified will be used.
0063         The channel should be reserved on the DMA controller using the
0064         ingenic,reserved-channels property.
0065
0066   ingenic,reserved-channels:
0067     $ref: /schemas/types.yaml#/definitions/uint32
0068     description: >
0069       Bitmask of channels to reserve for devices that need a specific
0070       channel. These channels will only be assigned when explicitely
0071       requested by a client. The primary use for this is channels 0 and
0072       1, which can be configured to have special behaviour for NAND/BCH
0073       when using programmable firmware.
0074
0075 required:
0076   - compatible
0077   - reg
0078   - interrupts
0079   - clocks
0080
0081 unevaluatedProperties: false
0082
0083 examples:
0084   - |
0085     #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
0086     dma: dma-controller@13420000 {
0087       compatible = "ingenic,jz4780-dma";
0088       reg = <0x13420000 0x400>, <0x13421000 0x40>;
0089
0090       interrupt-parent = <&intc>;
0091       interrupts = <10>;
0092
0093       clocks = <&cgu JZ4780_CLK_PDMA>;
0094
0095       #dma-cells = <2>;
0096
0097       ingenic,reserved-channels = <0x3>;
0098     };