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OSCL-LXR

 
 

    


0001 * IMG Multi-threaded DMA Controller (MDC)
0002 
0003 Required properties:
0004 - compatible: Must be "img,pistachio-mdc-dma".
0005 - reg: Must contain the base address and length of the MDC registers.
0006 - interrupts: Must contain all the per-channel DMA interrupts.
0007 - clocks: Must contain an entry for each entry in clock-names.
0008   See ../clock/clock-bindings.txt for details.
0009 - clock-names: Must include the following entries:
0010   - sys: MDC system interface clock.
0011 - img,cr-periph: Must contain a phandle to the peripheral control syscon
0012   node which contains the DMA request to channel mapping registers.
0013 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier.
0014   The maximum burst size is this value multiplied by the hardware-reported bus
0015   width.
0016 - #dma-cells: Must be 3:
0017   - The first cell is the peripheral's DMA request line.
0018   - The second cell is a bitmap specifying to which channels the DMA request
0019     line may be mapped (i.e. bit N set indicates channel N is usable).
0020   - The third cell is the thread ID to be used by the channel.
0021 
0022 Optional properties:
0023 - dma-channels: Number of supported DMA channels, up to 32.  If not specified
0024   the number reported by the hardware is used.
0025 
0026 Example:
0027 
0028 mdc: dma-controller@18143000 {
0029         compatible = "img,pistachio-mdc-dma";
0030         reg = <0x18143000 0x1000>;
0031         interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>,
0032                      <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>,
0033                      <GIC_SHARED 29 IRQ_TYPE_LEVEL_HIGH>,
0034                      <GIC_SHARED 30 IRQ_TYPE_LEVEL_HIGH>,
0035                      <GIC_SHARED 31 IRQ_TYPE_LEVEL_HIGH>,
0036                      <GIC_SHARED 32 IRQ_TYPE_LEVEL_HIGH>,
0037                      <GIC_SHARED 33 IRQ_TYPE_LEVEL_HIGH>,
0038                      <GIC_SHARED 34 IRQ_TYPE_LEVEL_HIGH>,
0039                      <GIC_SHARED 35 IRQ_TYPE_LEVEL_HIGH>,
0040                      <GIC_SHARED 36 IRQ_TYPE_LEVEL_HIGH>,
0041                      <GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>,
0042                      <GIC_SHARED 38 IRQ_TYPE_LEVEL_HIGH>;
0043         clocks = <&system_clk>;
0044         clock-names = "sys";
0045 
0046         img,max-burst-multiplier = <16>;
0047         img,cr-periph = <&cr_periph>;
0048 
0049         #dma-cells = <3>;
0050 };
0051 
0052 spi@18100f00 {
0053         ...
0054         dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
0055         dma-names = "tx", "rx";
0056         ...
0057 };