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0001 Analog Devices AXI-DMAC DMA controller
0002 
0003 Required properties:
0004  - compatible: Must be "adi,axi-dmac-1.00.a".
0005  - reg: Specification for the controllers memory mapped register map.
0006  - interrupts: Specification for the controllers interrupt.
0007  - clocks: Phandle and specifier to the controllers AXI interface clock
0008  - #dma-cells: Must be 1.
0009 
0010 Required sub-nodes:
0011  - adi,channels: This sub-node must contain a sub-node for each DMA channel. For
0012    the channel sub-nodes the following bindings apply. They must match the
0013    configuration options of the peripheral as it was instantiated.
0014 
0015 Required properties for adi,channels sub-node:
0016  - #size-cells: Must be 0
0017  - #address-cells: Must be 1
0018 
0019 Required channel sub-node properties:
0020  - reg: Which channel this node refers to.
0021  - adi,source-bus-width,
0022    adi,destination-bus-width: Width of the source or destination bus in bits.
0023  - adi,source-bus-type,
0024    adi,destination-bus-type: Type of the source or destination bus. Must be one
0025    of the following:
0026         0 (AXI_DMAC_TYPE_AXI_MM): Memory mapped AXI interface
0027         1 (AXI_DMAC_TYPE_AXI_STREAM): Streaming AXI interface
0028         2 (AXI_DMAC_TYPE_AXI_FIFO): FIFO interface
0029 
0030 Deprecated optional channel properties:
0031  - adi,length-width: Width of the DMA transfer length register.
0032  - adi,cyclic: Must be set if the channel supports hardware cyclic DMA
0033    transfers.
0034  - adi,2d: Must be set if the channel supports hardware 2D DMA transfers.
0035 
0036 DMA clients connected to the AXI-DMAC DMA controller must use the format
0037 described in the dma.txt file using a one-cell specifier. The value of the
0038 specifier refers to the DMA channel index.
0039 
0040 Example:
0041 
0042 dma: dma@7c420000 {
0043         compatible = "adi,axi-dmac-1.00.a";
0044         reg = <0x7c420000 0x10000>;
0045         interrupts = <0 57 0>;
0046         clocks = <&clkc 16>;
0047         #dma-cells = <1>;
0048 
0049         adi,channels {
0050                 #size-cells = <0>;
0051                 #address-cells = <1>;
0052 
0053                 dma-channel@0 {
0054                         reg = <0>;
0055                         adi,source-bus-width = <32>;
0056                         adi,source-bus-type = <ADI_AXI_DMAC_TYPE_MM_AXI>;
0057                         adi,destination-bus-width = <64>;
0058                         adi,destination-bus-type = <ADI_AXI_DMAC_TYPE_FIFO>;
0059                 };
0060         };
0061 };