0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 # Copyright 2019 Bootlin
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007
0008 title: Xylon LogiCVC display controller
0009
0010 maintainers:
0011 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
0012
0013 description: |
0014 The Xylon LogiCVC is a display controller that supports multiple layers.
0015 It is usually implemented as programmable logic and was optimized for use
0016 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
0017
0018 Because the controller is intended for use in a FPGA, most of the
0019 configuration of the controller takes place at logic configuration bitstream
0020 synthesis time. As a result, many of the device-tree bindings are meant to
0021 reflect the synthesis configuration and must not be configured differently.
0022 Matching synthesis parameters are provided when applicable.
0023
0024 Layers are declared in the "layers" sub-node and have dedicated configuration.
0025 In version 3 of the controller, each layer has fixed memory offset and address
0026 starting from the video memory base address for its framebuffer. In version 4,
0027 framebuffers are configured with a direct memory address instead.
0028
0029 properties:
0030 compatible:
0031 enum:
0032 - xylon,logicvc-3.02.a-display
0033 - xylon,logicvc-4.01.a-display
0034
0035 reg:
0036 maxItems: 1
0037
0038 clocks:
0039 minItems: 1
0040 maxItems: 4
0041
0042 clock-names:
0043 minItems: 1
0044 items:
0045 # vclk is required and must be provided as first item.
0046 - const: vclk
0047 # Other clocks are optional and can be provided in any order.
0048 - enum:
0049 - vclk2
0050 - lvdsclk
0051 - lvdsclkn
0052 - enum:
0053 - vclk2
0054 - lvdsclk
0055 - lvdsclkn
0056 - enum:
0057 - vclk2
0058 - lvdsclk
0059 - lvdsclkn
0060
0061 interrupts:
0062 maxItems: 1
0063
0064 memory-region:
0065 maxItems: 1
0066
0067 xylon,display-interface:
0068 enum:
0069 # Parallel RGB interface (C_DISPLAY_INTERFACE == 0)
0070 - parallel-rgb
0071 # ITU-T BR656 interface (C_DISPLAY_INTERFACE == 1)
0072 - bt656
0073 # 4-bit LVDS interface (C_DISPLAY_INTERFACE == 2)
0074 - lvds-4bits
0075 # 3-bit LVDS interface (C_DISPLAY_INTERFACE == 4)
0076 - lvds-3bits
0077 # DVI interface (C_DISPLAY_INTERFACE == 5)
0078 - dvi
0079 description: Display output interface (C_DISPLAY_INTERFACE).
0080
0081 xylon,display-colorspace:
0082 enum:
0083 # RGB colorspace (C_DISPLAY_COLOR_SPACE == 0)
0084 - rgb
0085 # YUV 4:2:2 colorspace (C_DISPLAY_COLOR_SPACE == 1)
0086 - yuv422
0087 # YUV 4:4:4 colorspace (C_DISPLAY_COLOR_SPACE == 2)
0088 - yuv444
0089 description: Display output colorspace (C_DISPLAY_COLOR_SPACE).
0090
0091 xylon,display-depth:
0092 $ref: "/schemas/types.yaml#/definitions/uint32"
0093 description: Display output depth (C_PIXEL_DATA_WIDTH).
0094
0095 xylon,row-stride:
0096 $ref: "/schemas/types.yaml#/definitions/uint32"
0097 description: Fixed number of pixels in a framebuffer row (C_ROW_STRIDE).
0098
0099 xylon,dithering:
0100 $ref: "/schemas/types.yaml#/definitions/flag"
0101 description: Dithering module is enabled (C_XCOLOR)
0102
0103 xylon,background-layer:
0104 $ref: "/schemas/types.yaml#/definitions/flag"
0105 description: |
0106 The last layer is used to display a black background (C_USE_BACKGROUND).
0107 The layer must still be registered.
0108
0109 xylon,layers-configurable:
0110 $ref: "/schemas/types.yaml#/definitions/flag"
0111 description: |
0112 Configuration of layers' size, position and offset is enabled
0113 (C_USE_SIZE_POSITION).
0114
0115 layers:
0116 type: object
0117
0118 properties:
0119 "#address-cells":
0120 const: 1
0121
0122 "#size-cells":
0123 const: 0
0124
0125 patternProperties:
0126 "^layer@[0-9]+$":
0127 type: object
0128
0129 properties:
0130 reg:
0131 maxItems: 1
0132
0133 xylon,layer-depth:
0134 $ref: "/schemas/types.yaml#/definitions/uint32"
0135 description: Layer depth (C_LAYER_X_DATA_WIDTH).
0136
0137 xylon,layer-colorspace:
0138 enum:
0139 # RGB colorspace (C_LAYER_X_TYPE == 0)
0140 - rgb
0141 # YUV packed colorspace (C_LAYER_X_TYPE == 0)
0142 - yuv
0143 description: Layer colorspace (C_LAYER_X_TYPE).
0144
0145 xylon,layer-alpha-mode:
0146 enum:
0147 # Alpha is configured layer-wide (C_LAYER_X_ALPHA_MODE == 0)
0148 - layer
0149 # Alpha is configured per-pixel (C_LAYER_X_ALPHA_MODE == 1)
0150 - pixel
0151 description: Alpha mode for the layer (C_LAYER_X_ALPHA_MODE).
0152
0153 xylon,layer-base-offset:
0154 $ref: "/schemas/types.yaml#/definitions/uint32"
0155 description: |
0156 Offset in number of lines (C_LAYER_X_OFFSET) starting from the
0157 video RAM base (C_VMEM_BASEADDR), only for version 3.
0158
0159 xylon,layer-buffer-offset:
0160 $ref: "/schemas/types.yaml#/definitions/uint32"
0161 description: |
0162 Offset in number of lines (C_BUFFER_*_OFFSET) starting from the
0163 layer base offset for the second buffer used in double-buffering.
0164
0165 xylon,layer-primary:
0166 $ref: "/schemas/types.yaml#/definitions/flag"
0167 description: |
0168 Layer should be registered as a primary plane (exactly one is
0169 required).
0170
0171 additionalProperties: false
0172
0173 required:
0174 - reg
0175 - xylon,layer-depth
0176 - xylon,layer-colorspace
0177 - xylon,layer-alpha-mode
0178
0179 required:
0180 - "#address-cells"
0181 - "#size-cells"
0182 - layer@0
0183
0184 additionalProperties: false
0185
0186 description: |
0187 The description of the display controller layers, containing layer
0188 sub-nodes that each describe a registered layer.
0189
0190 port:
0191 $ref: /schemas/graph.yaml#/properties/port
0192 description: |
0193 Video output port, typically connected to a panel or bridge.
0194
0195 additionalProperties: false
0196
0197 required:
0198 - compatible
0199 - reg
0200 - clocks
0201 - clock-names
0202 - interrupts
0203 - xylon,display-interface
0204 - xylon,display-colorspace
0205 - xylon,display-depth
0206 - xylon,row-stride
0207 - layers
0208 - port
0209
0210 examples:
0211 - |
0212 #include <dt-bindings/interrupt-controller/irq.h>
0213
0214 logicvc: logicvc@43c00000 {
0215 compatible = "xylon,logicvc-3.02.a", "syscon", "simple-mfd";
0216 reg = <0x43c00000 0x6000>;
0217
0218 #address-cells = <1>;
0219 #size-cells = <1>;
0220
0221 logicvc_display: display@0 {
0222 compatible = "xylon,logicvc-3.02.a-display";
0223 reg = <0x0 0x6000>;
0224
0225 memory-region = <&logicvc_cma>;
0226
0227 clocks = <&logicvc_vclk 0>, <&logicvc_lvdsclk 0>;
0228 clock-names = "vclk", "lvdsclk";
0229
0230 interrupt-parent = <&intc>;
0231 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
0232
0233 xylon,display-interface = "lvds-4bits";
0234 xylon,display-colorspace = "rgb";
0235 xylon,display-depth = <16>;
0236 xylon,row-stride = <1024>;
0237
0238 xylon,layers-configurable;
0239
0240 layers {
0241 #address-cells = <1>;
0242 #size-cells = <0>;
0243
0244 layer@0 {
0245 reg = <0>;
0246 xylon,layer-depth = <16>;
0247 xylon,layer-colorspace = "rgb";
0248 xylon,layer-alpha-mode = "layer";
0249 xylon,layer-base-offset = <0>;
0250 xylon,layer-buffer-offset = <480>;
0251 xylon,layer-primary;
0252 };
0253
0254 layer@1 {
0255 reg = <1>;
0256 xylon,layer-depth = <16>;
0257 xylon,layer-colorspace = "rgb";
0258 xylon,layer-alpha-mode = "layer";
0259 xylon,layer-base-offset = <2400>;
0260 xylon,layer-buffer-offset = <480>;
0261 };
0262
0263 layer@2 {
0264 reg = <2>;
0265 xylon,layer-depth = <16>;
0266 xylon,layer-colorspace = "rgb";
0267 xylon,layer-alpha-mode = "layer";
0268 xylon,layer-base-offset = <960>;
0269 xylon,layer-buffer-offset = <480>;
0270 };
0271
0272 layer@3 {
0273 reg = <3>;
0274 xylon,layer-depth = <16>;
0275 xylon,layer-colorspace = "rgb";
0276 xylon,layer-alpha-mode = "layer";
0277 xylon,layer-base-offset = <480>;
0278 xylon,layer-buffer-offset = <480>;
0279 };
0280
0281 layer@4 {
0282 reg = <4>;
0283 xylon,layer-depth = <16>;
0284 xylon,layer-colorspace = "rgb";
0285 xylon,layer-alpha-mode = "layer";
0286 xylon,layer-base-offset = <8192>;
0287 xylon,layer-buffer-offset = <480>;
0288 };
0289 };
0290
0291 port {
0292 #address-cells = <1>;
0293 #size-cells = <0>;
0294
0295 logicvc_output: endpoint@0 {
0296 reg = <0>;
0297 remote-endpoint = <&panel_input>;
0298 };
0299 };
0300 };
0301 };
