0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr3d.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NVIDIA 3D graphics engine
0008
0009 maintainers:
0010 - Thierry Reding <thierry.reding@gmail.com>
0011 - Jon Hunter <jonathanh@nvidia.com>
0012
0013 properties:
0014 $nodename:
0015 pattern: "^gr3d@[0-9a-f]+$"
0016
0017 compatible:
0018 enum:
0019 - nvidia,tegra20-gr3d
0020 - nvidia,tegra30-gr3d
0021 - nvidia,tegra114-gr3d
0022
0023 reg:
0024 maxItems: 1
0025
0026 clocks:
0027 minItems: 1
0028 maxItems: 2
0029
0030 clock-names:
0031 minItems: 1
0032 maxItems: 2
0033
0034 resets:
0035 minItems: 2
0036 maxItems: 4
0037
0038 reset-names:
0039 minItems: 2
0040 maxItems: 4
0041
0042 iommus:
0043 minItems: 1
0044 maxItems: 2
0045
0046 interconnects:
0047 minItems: 4
0048 maxItems: 10
0049
0050 interconnect-names:
0051 minItems: 4
0052 maxItems: 10
0053
0054 operating-points-v2:
0055 $ref: "/schemas/types.yaml#/definitions/phandle"
0056
0057 power-domains:
0058 minItems: 1
0059 maxItems: 2
0060
0061 power-domain-names:
0062 minItems: 2
0063 maxItems: 2
0064
0065 allOf:
0066 - if:
0067 properties:
0068 compatible:
0069 contains:
0070 const: nvidia,tegra20-gr2d
0071 then:
0072 properties:
0073 clocks:
0074 items:
0075 - description: module clock
0076
0077 clock-names:
0078 items:
0079 - const: 3d
0080
0081 resets:
0082 items:
0083 - description: module reset
0084 - description: memory client hotflush reset
0085
0086 reset-names:
0087 items:
0088 - const: 3d
0089 - const: mc
0090
0091 iommus:
0092 maxItems: 1
0093
0094 interconnects:
0095 minItems: 4
0096 maxItems: 4
0097
0098 interconnect-names:
0099 minItems: 4
0100 maxItems: 4
0101
0102 power-domains:
0103 items:
0104 - description: phandle to the TD power domain
0105
0106 - if:
0107 properties:
0108 compatible:
0109 contains:
0110 const: nvidia,tegra30-gr3d
0111 then:
0112 properties:
0113 clocks:
0114 items:
0115 - description: primary module clock
0116 - description: secondary module clock
0117
0118 clock-names:
0119 items:
0120 - const: 3d
0121 - const: 3d2
0122
0123 resets:
0124 items:
0125 - description: primary module reset
0126 - description: secondary module reset
0127 - description: primary memory client hotflush reset
0128 - description: secondary memory client hotflush reset
0129
0130 reset-names:
0131 items:
0132 - const: 3d
0133 - const: 3d2
0134 - const: mc
0135 - const: mc2
0136
0137 iommus:
0138 minItems: 2
0139 maxItems: 2
0140
0141 interconnects:
0142 minItems: 8
0143 maxItems: 8
0144
0145 interconnect-names:
0146 minItems: 8
0147 maxItems: 8
0148
0149 power-domains:
0150 items:
0151 - description: phandle to the TD power domain
0152 - description: phandle to the TD2 power domain
0153
0154 power-domain-names:
0155 items:
0156 - const: 3d0
0157 - const: 3d1
0158
0159 dependencies:
0160 power-domains: [ power-domain-names ]
0161
0162 - if:
0163 properties:
0164 compatible:
0165 contains:
0166 const: nvidia,tegra114-gr2d
0167 then:
0168 properties:
0169 clocks:
0170 items:
0171 - description: module clock
0172
0173 clock-names:
0174 items:
0175 - const: 3d
0176
0177 resets:
0178 items:
0179 - description: module reset
0180 - description: memory client hotflush reset
0181
0182 reset-names:
0183 items:
0184 - const: 3d
0185 - const: mc
0186
0187 iommus:
0188 maxItems: 1
0189
0190 interconnects:
0191 minItems: 10
0192 maxItems: 10
0193
0194 interconnect-names:
0195 minItems: 10
0196 maxItems: 10
0197
0198 power-domains:
0199 items:
0200 - description: phandle to the TD power domain
0201
0202 additionalProperties: false
0203
0204 examples:
0205 - |
0206 #include <dt-bindings/clock/tegra20-car.h>
0207 #include <dt-bindings/memory/tegra20-mc.h>
0208
0209 gr3d@54180000 {
0210 compatible = "nvidia,tegra20-gr3d";
0211 reg = <0x54180000 0x00040000>;
0212 clocks = <&tegra_car TEGRA20_CLK_GR3D>;
0213 resets = <&tegra_car 24>, <&mc TEGRA20_MC_RESET_3D>;
0214 reset-names = "3d", "mc";
0215 };
