display/tegra/nvidia%2Ctegra20-dc.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NVIDIA Tegra Display Controller
0008
0009 maintainers:
0010   - Thierry Reding <thierry.reding@gmail.com>
0011   - Jon Hunter <jonathanh@nvidia.com>
0012
0013 properties:
0014   $nodename:
0015     pattern: "^dc@[0-9a-f]+$"
0016
0017   compatible:
0018     oneOf:
0019       - enum:
0020           - nvidia,tegra20-dc
0021           - nvidia,tegra30-dc
0022           - nvidia,tegra114-dc
0023           - nvidia,tegra124-dc
0024           - nvidia,tegra210-dc
0025
0026       - items:
0027           - const: nvidia,tegra124-dc
0028           - const: nvidia,tegra132-dc
0029
0030   reg:
0031     maxItems: 1
0032
0033   interrupts:
0034     maxItems: 1
0035
0036   clocks:
0037     minItems: 1
0038     items:
0039       - description: display controller pixel clock
0040       - description: parent clock # optional
0041
0042   clock-names:
0043     minItems: 1
0044     items:
0045       - const: dc
0046       - const: parent # optional
0047
0048   resets:
0049     items:
0050       - description: module reset
0051
0052   reset-names:
0053     items:
0054       - const: dc
0055
0056   interconnect-names: true
0057   interconnects: true
0058
0059   iommus:
0060     maxItems: 1
0061
0062   operating-points-v2:
0063     $ref: "/schemas/types.yaml#/definitions/phandle"
0064
0065   power-domains:
0066     items:
0067       - description: phandle to the core power domain
0068
0069   memory-region: true
0070
0071   nvidia,head:
0072     $ref: /schemas/types.yaml#/definitions/uint32
0073     description: The number of the display controller head. This is used to setup the various
0074       types of output to receive video data from the given head.
0075
0076   nvidia,outputs:
0077     $ref: /schemas/types.yaml#/definitions/phandle-array
0078     description: A list of phandles of outputs that this display controller can drive.
0079
0080   rgb:
0081     type: object
0082
0083 allOf:
0084   - if:
0085       properties:
0086         compatible:
0087           contains:
0088             enum:
0089               - nvidia,tegra20-dc
0090               - nvidia,tegra30-dc
0091               - nvidia,tegra114-dc
0092     then:
0093       properties:
0094         interconnects:
0095           items:
0096             - description: window A memory client
0097             - description: window B memory client
0098             - description: window B memory client (vertical filter)
0099             - description: window C memory client
0100             - description: cursor memory client
0101
0102         interconnect-names:
0103           items:
0104             - const: wina
0105             - const: winb
0106             - const: winb-vfilter
0107             - const: winc
0108             - const: cursor
0109
0110         rgb:
0111           description: Each display controller node has a child node, named "rgb", that represents
0112             the RGB output associated with the controller.
0113           type: object
0114           properties:
0115             nvidia,ddc-i2c-bus:
0116               $ref: /schemas/types.yaml#/definitions/phandle
0117               description: phandle of an I2C controller used for DDC EDID probing
0118
0119             nvidia,hpd-gpio:
0120               description: specifies a GPIO used for hotplug detection
0121               maxItems: 1
0122
0123             nvidia,edid:
0124               $ref: /schemas/types.yaml#/definitions/uint8-array
0125               description: supplies a binary EDID blob
0126
0127             nvidia,panel:
0128               $ref: /schemas/types.yaml#/definitions/phandle
0129               description: phandle of a display panel
0130
0131   - if:
0132       properties:
0133         compatible:
0134           contains:
0135             enum:
0136               - nvidia,tegra124-dc
0137     then:
0138       properties:
0139         interconnects:
0140           minItems: 4
0141           items:
0142             - description: window A memory client
0143             - description: window B memory client
0144             - description: window C memory client
0145             - description: cursor memory client
0146             - description: window D memory client
0147             - description: window T memory client
0148
0149         interconnect-names:
0150           minItems: 4
0151           items:
0152             - const: wina
0153             - const: winb
0154             - const: winc
0155             - const: cursor
0156             - const: wind
0157             - const: wint
0158
0159 additionalProperties: false
0160
0161 required:
0162   - compatible
0163   - reg
0164   - interrupts
0165   - clocks
0166   - clock-names
0167   - resets
0168   - reset-names
0169
0170 examples:
0171   - |
0172     #include <dt-bindings/clock/tegra20-car.h>
0173     #include <dt-bindings/interrupt-controller/arm-gic.h>
0174
0175     dc@54200000 {
0176         compatible = "nvidia,tegra20-dc";
0177         reg = <0x54200000 0x00040000>;
0178         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0179         clocks = <&tegra_car TEGRA20_CLK_DISP1>;
0180         clock-names = "dc";
0181         resets = <&tegra_car 27>;
0182         reset-names = "dc";
0183     };