bindings/display/st%2Cstm32-dsi.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: STMicroelectronics STM32 DSI host controller
0008
0009 maintainers:
0010   - Philippe Cornu <philippe.cornu@foss.st.com>
0011   - Yannick Fertre <yannick.fertre@foss.st.com>
0012
0013 description:
0014   The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
0015
0016 allOf:
0017   - $ref: dsi-controller.yaml#
0018
0019 properties:
0020   compatible:
0021     const: st,stm32-dsi
0022
0023   reg:
0024     maxItems: 1
0025
0026   clocks:
0027     items:
0028       - description: Module Clock
0029       - description: DSI bus clock
0030       - description: Pixel clock
0031     minItems: 2
0032
0033   clock-names:
0034     items:
0035       - const: pclk
0036       - const: ref
0037       - const: px_clk
0038     minItems: 2
0039
0040   resets:
0041     maxItems: 1
0042
0043   reset-names:
0044     items:
0045       - const: apb
0046
0047   phy-dsi-supply:
0048     description:
0049       Phandle of the regulator that provides the supply voltage.
0050
0051   ports:
0052     $ref: /schemas/graph.yaml#/properties/ports
0053
0054     properties:
0055       port@0:
0056         $ref: /schemas/graph.yaml#/properties/port
0057         description:
0058           DSI input port node, connected to the ltdc rgb output port.
0059
0060       port@1:
0061         $ref: /schemas/graph.yaml#/properties/port
0062         description:
0063           DSI output port node, connected to a panel or a bridge input port"
0064
0065 required:
0066   - "#address-cells"
0067   - "#size-cells"
0068   - compatible
0069   - reg
0070   - clocks
0071   - clock-names
0072   - ports
0073
0074 unevaluatedProperties: false
0075
0076 examples:
0077   - |
0078     #include <dt-bindings/interrupt-controller/arm-gic.h>
0079     #include <dt-bindings/clock/stm32mp1-clks.h>
0080     #include <dt-bindings/reset/stm32mp1-resets.h>
0081     #include <dt-bindings/gpio/gpio.h>
0082     dsi: dsi@5a000000 {
0083         compatible = "st,stm32-dsi";
0084         reg = <0x5a000000 0x800>;
0085         clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
0086         clock-names = "pclk", "ref", "px_clk";
0087         resets = <&rcc DSI_R>;
0088         reset-names = "apb";
0089         phy-dsi-supply = <&reg18>;
0090
0091         #address-cells = <1>;
0092         #size-cells = <0>;
0093
0094         ports {
0095               #address-cells = <1>;
0096               #size-cells = <0>;
0097
0098               port@0 {
0099                     reg = <0>;
0100                     dsi_in: endpoint {
0101                         remote-endpoint = <&ltdc_ep1_out>;
0102                     };
0103               };
0104
0105               port@1 {
0106                     reg = <1>;
0107                     dsi_out: endpoint {
0108                         remote-endpoint = <&panel_in>;
0109                     };
0110               };
0111         };
0112
0113         panel@0 {
0114               compatible = "orisetech,otm8009a";
0115               reg = <0>;
0116               reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
0117               power-supply = <&v3v3>;
0118
0119               port {
0120                     panel_in: endpoint {
0121                         remote-endpoint = <&dsi_out>;
0122                     };
0123               };
0124         };
0125     };
0126
0127 ...