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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Unisoc MIPI DSI Controller
0008 
0009 maintainers:
0010   - Kevin Tang <kevin.tang@unisoc.com>
0011 
0012 properties:
0013   compatible:
0014     const: sprd,sharkl3-dsi-host
0015 
0016   reg:
0017     maxItems: 1
0018 
0019   interrupts:
0020     maxItems: 2
0021 
0022   clocks:
0023     minItems: 1
0024 
0025   clock-names:
0026     items:
0027       - const: clk_src_96m
0028 
0029   power-domains:
0030     maxItems: 1
0031 
0032   ports:
0033     type: object
0034 
0035     properties:
0036       "#address-cells":
0037         const: 1
0038 
0039       "#size-cells":
0040         const: 0
0041 
0042       port@0:
0043         type: object
0044         description:
0045           A port node with endpoint definitions as defined in
0046           Documentation/devicetree/bindings/media/video-interfaces.txt.
0047           That port should be the input endpoint, usually coming from
0048           the associated DPU.
0049 
0050     required:
0051       - "#address-cells"
0052       - "#size-cells"
0053       - port@0
0054 
0055     additionalProperties: false
0056 
0057 required:
0058   - compatible
0059   - reg
0060   - interrupts
0061   - clocks
0062   - clock-names
0063   - ports
0064 
0065 additionalProperties: false
0066 
0067 examples:
0068   - |
0069     #include <dt-bindings/interrupt-controller/arm-gic.h>
0070     #include <dt-bindings/clock/sprd,sc9860-clk.h>
0071     dsi: dsi@63100000 {
0072         compatible = "sprd,sharkl3-dsi-host";
0073         reg = <0x63100000 0x1000>;
0074         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
0075           <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
0076         clock-names = "clk_src_96m";
0077         clocks = <&pll CLK_TWPLL_96M>;
0078         ports {
0079             #address-cells = <1>;
0080             #size-cells = <0>;
0081             port@0 {
0082                 reg = <0>;
0083                 dsi_in: endpoint {
0084                     remote-endpoint = <&dpu_out>;
0085                 };
0086             };
0087         };
0088     };