0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dpu.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Unisoc Sharkl3 Display Processor Unit (DPU)
0008
0009 maintainers:
0010 - Kevin Tang <kevin.tang@unisoc.com>
0011
0012 description: |
0013 DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
0014 which transfers the image data from a video memory buffer to an internal
0015 LCD interface.
0016
0017 properties:
0018 compatible:
0019 const: sprd,sharkl3-dpu
0020
0021 reg:
0022 maxItems: 1
0023
0024 interrupts:
0025 maxItems: 1
0026
0027 clocks:
0028 minItems: 2
0029
0030 clock-names:
0031 items:
0032 - const: clk_src_128m
0033 - const: clk_src_384m
0034
0035 power-domains:
0036 maxItems: 1
0037
0038 iommus:
0039 maxItems: 1
0040
0041 port:
0042 type: object
0043 description:
0044 A port node with endpoint definitions as defined in
0045 Documentation/devicetree/bindings/media/video-interfaces.txt.
0046 That port should be the output endpoint, usually output to
0047 the associated DSI.
0048
0049 required:
0050 - compatible
0051 - reg
0052 - interrupts
0053 - clocks
0054 - clock-names
0055 - port
0056
0057 additionalProperties: false
0058
0059 examples:
0060 - |
0061 #include <dt-bindings/interrupt-controller/arm-gic.h>
0062 #include <dt-bindings/clock/sprd,sc9860-clk.h>
0063 dpu: dpu@63000000 {
0064 compatible = "sprd,sharkl3-dpu";
0065 reg = <0x63000000 0x1000>;
0066 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
0067 clock-names = "clk_src_128m", "clk_src_384m";
0068
0069 clocks = <&pll CLK_TWPLL_128M>,
0070 <&pll CLK_TWPLL_384M>;
0071
0072 dpu_port: port {
0073 dpu_out: endpoint {
0074 remote-endpoint = <&dsi_in>;
0075 };
0076 };
0077 };
