0001 # SPDX-License-Identifier: GPL-2.0-only
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung Exynos SoC HDMI
0008
0009 maintainers:
0010 - Inki Dae <inki.dae@samsung.com>
0011 - Seung-Woo Kim <sw0312.kim@samsung.com>
0012 - Kyungmin Park <kyungmin.park@samsung.com>
0013 - Krzysztof Kozlowski <krzk@kernel.org>
0014
0015 properties:
0016 compatible:
0017 enum:
0018 - samsung,exynos4210-hdmi
0019 - samsung,exynos4212-hdmi
0020 - samsung,exynos5420-hdmi
0021 - samsung,exynos5433-hdmi
0022
0023 clocks:
0024 minItems: 5
0025 maxItems: 10
0026
0027 clock-names:
0028 minItems: 5
0029 maxItems: 10
0030
0031 ddc:
0032 $ref: /schemas/types.yaml#/definitions/phandle
0033 description:
0034 Phandle to the HDMI DDC node.
0035
0036 hdmi-en-supply:
0037 description:
0038 Provides voltage source for DCC lines available on HDMI connector. When
0039 there is no power provided for DDC epprom, some TV-sets do not pulls up
0040 HPD (hot plug detect) line, what causes HDMI block to stay turned off.
0041 When provided, the regulator allows TV-set correctly signal HPD event.
0042
0043 hpd-gpios:
0044 maxItems: 1
0045 description:
0046 A GPIO line connected to HPD
0047
0048 interrupts:
0049 maxItems: 1
0050
0051 phy:
0052 $ref: /schemas/types.yaml#/definitions/phandle
0053 description: Phandle to the HDMI PHY node.
0054
0055 ports:
0056 $ref: /schemas/graph.yaml#/properties/ports
0057 description:
0058 Contains a port which is connected to mic node.
0059
0060 power-domains:
0061 maxItems: 1
0062
0063 reg:
0064 maxItems: 1
0065
0066 samsung,syscon-phandle:
0067 $ref: /schemas/types.yaml#/definitions/phandle
0068 description:
0069 Phandle to the PMU system controller node.
0070
0071 samsung,sysreg-phandle:
0072 $ref: /schemas/types.yaml#/definitions/phandle
0073 description:
0074 Phandle to DISP system controller interface.
0075
0076 '#sound-dai-cells':
0077 const: 0
0078
0079 vdd-supply:
0080 description:
0081 VDD 1.0V HDMI TX.
0082
0083 vdd_osc-supply:
0084 description:
0085 VDD 1.8V HDMI OSC.
0086
0087 vdd_pll-supply:
0088 description:
0089 VDD 1.0V HDMI PLL.
0090
0091 required:
0092 - compatible
0093 - clocks
0094 - clock-names
0095 - ddc
0096 - hpd-gpios
0097 - interrupts
0098 - phy
0099 - reg
0100 - samsung,syscon-phandle
0101 - '#sound-dai-cells'
0102 - vdd-supply
0103 - vdd_osc-supply
0104 - vdd_pll-supply
0105
0106 allOf:
0107 - if:
0108 properties:
0109 compatible:
0110 contains:
0111 const: samsung,exynos5433-hdmi
0112 then:
0113 properties:
0114 clocks:
0115 items:
0116 - description: Gate of HDMI IP APB bus.
0117 - description: Gate of HDMI-PHY IP APB bus.
0118 - description: Gate of HDMI TMDS clock.
0119 - description: Gate of HDMI pixel clock.
0120 - description: TMDS clock generated by HDMI-PHY.
0121 - description: MUX used to switch between oscclk and tmds_clko,
0122 respectively if HDMI-PHY is off and operational.
0123 - description: Pixel clock generated by HDMI-PHY.
0124 - description: MUX used to switch between oscclk and pixel_clko,
0125 respectively if HDMI-PHY is off and operational.
0126 - description: Oscillator clock, used as parent of following *_user
0127 clocks in case HDMI-PHY is not operational.
0128 - description: Gate of HDMI SPDIF clock.
0129 clock-names:
0130 items:
0131 - const: hdmi_pclk
0132 - const: hdmi_i_pclk
0133 - const: i_tmds_clk
0134 - const: i_pixel_clk
0135 - const: tmds_clko
0136 - const: tmds_clko_user
0137 - const: pixel_clko
0138 - const: pixel_clko_user
0139 - const: oscclk
0140 - const: i_spdif_clk
0141 required:
0142 - samsung,sysreg-phandle
0143 else:
0144 properties:
0145 clocks:
0146 items:
0147 - description: Gate of HDMI IP bus clock.
0148 - description: Gate of HDMI special clock.
0149 - description: Pixel special clock, one of the two possible inputs
0150 of HDMI clock mux.
0151 - description: HDMI PHY clock output, one of two possible inputs of
0152 HDMI clock mux.
0153 - description: It is required by the driver to switch between the 2
0154 parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
0155 after configuration, parent is set to sclk_hdmiphy else
0156 sclk_pixel.
0157 clock-names:
0158 items:
0159 - const: hdmi
0160 - const: sclk_hdmi
0161 - const: sclk_pixel
0162 - const: sclk_hdmiphy
0163 - const: mout_hdmi
0164
0165 additionalProperties: false
0166
0167 examples:
0168 - |
0169 #include <dt-bindings/clock/exynos5433.h>
0170 #include <dt-bindings/gpio/gpio.h>
0171 #include <dt-bindings/interrupt-controller/arm-gic.h>
0172
0173 hdmi@13970000 {
0174 compatible = "samsung,exynos5433-hdmi";
0175 reg = <0x13970000 0x70000>;
0176 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
0177 clocks = <&cmu_disp CLK_PCLK_HDMI>,
0178 <&cmu_disp CLK_PCLK_HDMIPHY>,
0179 <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>,
0180 <&cmu_disp CLK_PHYCLK_HDMI_PIXEL>,
0181 <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>,
0182 <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>,
0183 <&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>,
0184 <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>,
0185 <&xxti>,
0186 <&cmu_disp CLK_SCLK_HDMI_SPDIF>;
0187 clock-names = "hdmi_pclk",
0188 "hdmi_i_pclk",
0189 "i_tmds_clk",
0190 "i_pixel_clk",
0191 "tmds_clko",
0192 "tmds_clko_user",
0193 "pixel_clko",
0194 "pixel_clko_user",
0195 "oscclk",
0196 "i_spdif_clk";
0197 phy = <&hdmiphy>;
0198 ddc = <&hsi2c_11>;
0199 samsung,syscon-phandle = <&pmu_system_controller>;
0200 samsung,sysreg-phandle = <&syscon_disp>;
0201 #sound-dai-cells = <0>;
0202
0203 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
0204 vdd-supply = <&ldo6_reg>;
0205 vdd_osc-supply = <&ldo7_reg>;
0206 vdd_pll-supply = <&ldo6_reg>;
0207
0208 ports {
0209 #address-cells = <1>;
0210 #size-cells = <0>;
0211
0212 port@0 {
0213 reg = <0>;
0214 hdmi_to_tv: endpoint {
0215 remote-endpoint = <&tv_to_hdmi>;
0216 };
0217 };
0218
0219 port@1 {
0220 reg = <1>;
0221 hdmi_to_mhl: endpoint {
0222 remote-endpoint = <&mhl_to_hdmi>;
0223 };
0224 };
0225 };
0226 };
