display/rockchip/rockchip-vop.yaml

0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Rockchip SoC display controller (VOP)
0008
0009 description:
0010   VOP (Video Output Processor) is the display controller for the Rockchip
0011   series of SoCs which transfers the image data from a video memory
0012   buffer to an external LCD interface.
0013
0014 maintainers:
0015   - Sandy Huang <hjc@rock-chips.com>
0016   - Heiko Stuebner <heiko@sntech.de>
0017
0018 properties:
0019   compatible:
0020     enum:
0021       - rockchip,px30-vop-big
0022       - rockchip,px30-vop-lit
0023       - rockchip,rk3036-vop
0024       - rockchip,rk3066-vop
0025       - rockchip,rk3126-vop
0026       - rockchip,rk3188-vop
0027       - rockchip,rk3228-vop
0028       - rockchip,rk3288-vop
0029       - rockchip,rk3328-vop
0030       - rockchip,rk3366-vop
0031       - rockchip,rk3368-vop
0032       - rockchip,rk3399-vop-big
0033       - rockchip,rk3399-vop-lit
0034
0035   reg:
0036     minItems: 1
0037     items:
0038       - description:
0039           Must contain one entry corresponding to the base address and length
0040           of the register space.
0041       - description:
0042           Can optionally contain a second entry corresponding to
0043           the CRTC gamma LUT address.
0044
0045   interrupts:
0046     maxItems: 1
0047     description:
0048       The VOP interrupt is shared by several interrupt sources, such as
0049       frame start (VSYNC), line flag and other status interrupts.
0050
0051   clocks:
0052     items:
0053       - description: Clock for ddr buffer transfer.
0054       - description: Pixel clock.
0055       - description: Clock for the ahb bus to R/W the phy regs.
0056
0057   clock-names:
0058     items:
0059       - const: aclk_vop
0060       - const: dclk_vop
0061       - const: hclk_vop
0062
0063   resets:
0064     maxItems: 3
0065
0066   reset-names:
0067     items:
0068       - const: axi
0069       - const: ahb
0070       - const: dclk
0071
0072   port:
0073     $ref: /schemas/graph.yaml#/properties/port
0074
0075   assigned-clocks:
0076     maxItems: 2
0077
0078   assigned-clock-rates:
0079     maxItems: 2
0080
0081   iommus:
0082     maxItems: 1
0083
0084   power-domains:
0085     maxItems: 1
0086
0087 required:
0088   - compatible
0089   - reg
0090   - interrupts
0091   - clocks
0092   - clock-names
0093   - resets
0094   - reset-names
0095   - port
0096
0097 additionalProperties: false
0098
0099 examples:
0100   - |
0101     #include <dt-bindings/clock/rk3288-cru.h>
0102     #include <dt-bindings/interrupt-controller/arm-gic.h>
0103     #include <dt-bindings/power/rk3288-power.h>
0104     vopb: vopb@ff930000 {
0105       compatible = "rockchip,rk3288-vop";
0106       reg = <0xff930000 0x19c>,
0107             <0xff931000 0x1000>;
0108       interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
0109       clocks = <&cru ACLK_VOP0>,
0110                <&cru DCLK_VOP0>,
0111                <&cru HCLK_VOP0>;
0112       clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
0113       power-domains = <&power RK3288_PD_VIO>;
0114       resets = <&cru SRST_LCDC1_AXI>,
0115                <&cru SRST_LCDC1_AHB>,
0116                <&cru SRST_LCDC1_DCLK>;
0117       reset-names = "axi", "ahb", "dclk";
0118       iommus = <&vopb_mmu>;
0119       vopb_out: port {
0120         #address-cells = <1>;
0121         #size-cells = <0>;
0122         vopb_out_edp: endpoint@0 {
0123           reg = <0>;
0124           remote-endpoint=<&edp_in_vopb>;
0125         };
0126         vopb_out_hdmi: endpoint@1 {
0127           reg = <1>;
0128           remote-endpoint=<&hdmi_in_vopb>;
0129         };
0130       };
0131     };