0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004
0005 $id: http://devicetree.org/schemas/display/msm/hdmi.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: Qualcomm Adreno/Snapdragon HDMI output
0009
0010 maintainers:
0011 - Rob Clark <robdclark@gmail.com>
0012
0013 properties:
0014 compatible:
0015 enum:
0016 - qcom,hdmi-tx-8084
0017 - qcom,hdmi-tx-8660
0018 - qcom,hdmi-tx-8960
0019 - qcom,hdmi-tx-8974
0020 - qcom,hdmi-tx-8994
0021 - qcom,hdmi-tx-8996
0022
0023 clocks:
0024 minItems: 1
0025 maxItems: 5
0026
0027 clock-names:
0028 minItems: 1
0029 maxItems: 5
0030
0031 reg:
0032 minItems: 1
0033 maxItems: 3
0034
0035 reg-names:
0036 minItems: 1
0037 items:
0038 - const: core_physical
0039 - const: qfprom_physical
0040 - const: hdcp_physical
0041
0042 interrupts:
0043 maxItems: 1
0044
0045 phys:
0046 maxItems: 1
0047
0048 phy-names:
0049 enum:
0050 - hdmi_phy
0051 - hdmi-phy
0052 deprecated: true
0053
0054 core-vdda-supply:
0055 description: phandle to VDDA supply regulator
0056
0057 hdmi-mux-supply:
0058 description: phandle to mux regulator
0059 deprecated: true
0060
0061 core-vcc-supply:
0062 description: phandle to VCC supply regulator
0063
0064 hpd-gpios:
0065 maxItems: 1
0066 description: hpd pin
0067
0068 qcom,hdmi-tx-mux-en-gpios:
0069 maxItems: 1
0070 deprecated: true
0071 description: HDMI mux enable pin
0072
0073 qcom,hdmi-tx-mux-sel-gpios:
0074 maxItems: 1
0075 deprecated: true
0076 description: HDMI mux select pin
0077
0078 qcom,hdmi-tx-mux-lpm-gpios:
0079 maxItems: 1
0080 deprecated: true
0081 description: HDMI mux lpm pin
0082
0083 '#sound-dai-cells':
0084 const: 1
0085
0086 ports:
0087 type: object
0088 $ref: /schemas/graph.yaml#/properties/ports
0089 properties:
0090 port@0:
0091 $ref: /schemas/graph.yaml#/$defs/port-base
0092 description: |
0093 Input endpoints of the controller.
0094
0095 port@1:
0096 $ref: /schemas/graph.yaml#/$defs/port-base
0097 description: |
0098 Output endpoints of the controller.
0099
0100 required:
0101 - port@0
0102
0103 required:
0104 - compatible
0105 - clocks
0106 - clock-names
0107 - reg
0108 - reg-names
0109 - interrupts
0110 - phys
0111
0112 allOf:
0113 - if:
0114 properties:
0115 compatible:
0116 contains:
0117 enum:
0118 - qcom,hdmi-tx-8960
0119 - qcom,hdmi-tx-8660
0120 then:
0121 properties:
0122 clocks:
0123 minItems: 3
0124 maxItems: 3
0125 clock-names:
0126 items:
0127 - const: core
0128 - const: master_iface
0129 - const: slave_iface
0130 core-vcc-supplies: false
0131
0132 - if:
0133 properties:
0134 compatible:
0135 contains:
0136 enum:
0137 - qcom,hdmi-tx-8974
0138 - qcom,hdmi-tx-8084
0139 - qcom,hdmi-tx-8994
0140 - qcom,hdmi-tx-8996
0141 then:
0142 properties:
0143 clocks:
0144 minItems: 5
0145 clock-names:
0146 items:
0147 - const: mdp_core
0148 - const: iface
0149 - const: core
0150 - const: alt_iface
0151 - const: extp
0152 hdmi-mux-supplies: false
0153
0154 additionalProperties: false
0155
0156 examples:
0157 - |
0158 #include <dt-bindings/gpio/gpio.h>
0159 #include <dt-bindings/interrupt-controller/irq.h>
0160 #include <dt-bindings/interrupt-controller/arm-gic.h>
0161 hdmi: hdmi@4a00000 {
0162 compatible = "qcom,hdmi-tx-8960";
0163 reg-names = "core_physical";
0164 reg = <0x04a00000 0x2f0>;
0165 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
0166 clock-names = "core",
0167 "master_iface",
0168 "slave_iface";
0169 clocks = <&clk 61>,
0170 <&clk 72>,
0171 <&clk 98>;
0172 hpd-gpios = <&msmgpio 72 GPIO_ACTIVE_HIGH>;
0173 core-vdda-supply = <&pm8921_hdmi_mvs>;
0174 hdmi-mux-supply = <&ext_3p3v>;
0175 pinctrl-names = "default", "sleep";
0176 pinctrl-0 = <&hpd_active &ddc_active &cec_active>;
0177 pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
0178
0179 phys = <&hdmi_phy>;
0180 };
0181 - |
0182 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
0183 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
0184 #include <dt-bindings/gpio/gpio.h>
0185 #include <dt-bindings/interrupt-controller/irq.h>
0186 #include <dt-bindings/interrupt-controller/arm-gic.h>
0187 hdmi@9a0000 {
0188 compatible = "qcom,hdmi-tx-8996";
0189 reg = <0x009a0000 0x50c>,
0190 <0x00070000 0x6158>,
0191 <0x009e0000 0xfff>;
0192 reg-names = "core_physical",
0193 "qfprom_physical",
0194 "hdcp_physical";
0195
0196 interrupt-parent = <&mdss>;
0197 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
0198
0199 clocks = <&mmcc MDSS_MDP_CLK>,
0200 <&mmcc MDSS_AHB_CLK>,
0201 <&mmcc MDSS_HDMI_CLK>,
0202 <&mmcc MDSS_HDMI_AHB_CLK>,
0203 <&mmcc MDSS_EXTPCLK_CLK>;
0204 clock-names = "mdp_core",
0205 "iface",
0206 "core",
0207 "alt_iface",
0208 "extp";
0209
0210 phys = <&hdmi_phy>;
0211 #sound-dai-cells = <1>;
0212
0213 pinctrl-names = "default", "sleep";
0214 pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>;
0215 pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>;
0216
0217 core-vdda-supply = <&vreg_l12a_1p8>;
0218 core-vcc-supply = <&vreg_s4a_1p8>;
0219
0220 ports {
0221 #address-cells = <1>;
0222 #size-cells = <0>;
0223
0224 port@0 {
0225 reg = <0>;
0226 endpoint {
0227 remote-endpoint = <&mdp5_intf3_out>;
0228 };
0229 };
0230 };
0231 };
0232 ...
