0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ovl-2l.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Mediatek display overlay 2 layer
0008
0009 maintainers:
0010 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
0011 - Philipp Zabel <p.zabel@pengutronix.de>
0012
0013 description: |
0014 Mediatek display overlay 2 layer, namely OVL-2L, provides 2 more layer
0015 for OVL.
0016 OVL-2L device node must be siblings to the central MMSYS_CONFIG node.
0017 For a description of the MMSYS_CONFIG binding, see
0018 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
0019 for details.
0020
0021 properties:
0022 compatible:
0023 oneOf:
0024 - items:
0025 - const: mediatek,mt8183-disp-ovl-2l
0026 - items:
0027 - const: mediatek,mt8192-disp-ovl-2l
0028 - items:
0029 - enum:
0030 - mediatek,mt8186-disp-ovl-2l
0031 - const: mediatek,mt8192-disp-ovl-2l
0032
0033 reg:
0034 maxItems: 1
0035
0036 interrupts:
0037 maxItems: 1
0038
0039 power-domains:
0040 description: A phandle and PM domain specifier as defined by bindings of
0041 the power controller specified by phandle. See
0042 Documentation/devicetree/bindings/power/power-domain.yaml for details.
0043
0044 clocks:
0045 items:
0046 - description: OVL-2L Clock
0047
0048 iommus:
0049 description:
0050 This property should point to the respective IOMMU block with master port as argument,
0051 see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
0052
0053 mediatek,gce-client-reg:
0054 description: The register of client driver can be configured by gce with
0055 4 arguments defined in this property, such as phandle of gce, subsys id,
0056 register offset and size. Each GCE subsys id is mapping to a client
0057 defined in the header include/dt-bindings/gce/<chip>-gce.h.
0058 $ref: /schemas/types.yaml#/definitions/phandle-array
0059 maxItems: 1
0060
0061 required:
0062 - compatible
0063 - reg
0064 - interrupts
0065 - power-domains
0066 - clocks
0067 - iommus
0068
0069 additionalProperties: false
0070
0071 examples:
0072 - |
0073 #include <dt-bindings/interrupt-controller/arm-gic.h>
0074 #include <dt-bindings/clock/mt8183-clk.h>
0075 #include <dt-bindings/power/mt8183-power.h>
0076 #include <dt-bindings/gce/mt8183-gce.h>
0077 #include <dt-bindings/memory/mt8183-larb-port.h>
0078
0079 soc {
0080 #address-cells = <2>;
0081 #size-cells = <2>;
0082
0083 ovl_2l0: ovl@14009000 {
0084 compatible = "mediatek,mt8183-disp-ovl-2l";
0085 reg = <0 0x14009000 0 0x1000>;
0086 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_LOW>;
0087 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
0088 clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
0089 iommus = <&iommu M4U_PORT_DISP_2L_OVL0_LARB0>;
0090 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
0091 };
0092 };
