display/mediatek/mediatek%2Cccorr.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ccorr.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Mediatek display color correction
0008
0009 maintainers:
0010   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
0011   - Philipp Zabel <p.zabel@pengutronix.de>
0012
0013 description: |
0014   Mediatek display color correction, namely CCORR, reproduces correct color
0015   on panels with different color gamut.
0016   CCORR device node must be siblings to the central MMSYS_CONFIG node.
0017   For a description of the MMSYS_CONFIG binding, see
0018   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
0019   for details.
0020
0021 properties:
0022   compatible:
0023     oneOf:
0024       - items:
0025           - const: mediatek,mt8183-disp-ccorr
0026       - items:
0027           - const: mediatek,mt8192-disp-ccorr
0028       - items:
0029           - enum:
0030               - mediatek,mt8195-disp-ccorr
0031           - const: mediatek,mt8192-disp-ccorr
0032       - items:
0033           - enum:
0034               - mediatek,mt8186-disp-ccorr
0035           - const: mediatek,mt8183-disp-ccorr
0036
0037   reg:
0038     maxItems: 1
0039
0040   interrupts:
0041     maxItems: 1
0042
0043   power-domains:
0044     description: A phandle and PM domain specifier as defined by bindings of
0045       the power controller specified by phandle. See
0046       Documentation/devicetree/bindings/power/power-domain.yaml for details.
0047
0048   clocks:
0049     items:
0050       - description: CCORR Clock
0051
0052   mediatek,gce-client-reg:
0053     description: The register of client driver can be configured by gce with
0054       4 arguments defined in this property, such as phandle of gce, subsys id,
0055       register offset and size. Each GCE subsys id is mapping to a client
0056       defined in the header include/dt-bindings/gce/<chip>-gce.h.
0057     $ref: /schemas/types.yaml#/definitions/phandle-array
0058     maxItems: 1
0059
0060 required:
0061   - compatible
0062   - reg
0063   - interrupts
0064   - power-domains
0065   - clocks
0066
0067 additionalProperties: false
0068
0069 examples:
0070   - |
0071     #include <dt-bindings/interrupt-controller/arm-gic.h>
0072     #include <dt-bindings/clock/mt8183-clk.h>
0073     #include <dt-bindings/power/mt8183-power.h>
0074     #include <dt-bindings/gce/mt8183-gce.h>
0075
0076     soc {
0077         #address-cells = <2>;
0078         #size-cells = <2>;
0079
0080         ccorr0: ccorr@1400f000 {
0081             compatible = "mediatek,mt8183-disp-ccorr";
0082             reg = <0 0x1400f000 0 0x1000>;
0083             interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>;
0084             power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
0085             clocks = <&mmsys CLK_MM_DISP_CCORR0>;
0086             mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
0087         };
0088     };