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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Freescale i.MX6 DWC HDMI TX Encoder
0008 
0009 maintainers:
0010   - Philipp Zabel <p.zabel@pengutronix.de>
0011 
0012 description: |
0013   The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
0014   with a companion PHY IP.
0015 
0016 allOf:
0017   - $ref: ../bridge/synopsys,dw-hdmi.yaml#
0018 
0019 properties:
0020   compatible:
0021     enum:
0022       - fsl,imx6dl-hdmi
0023       - fsl,imx6q-hdmi
0024 
0025   reg-io-width:
0026     const: 1
0027 
0028   clocks:
0029     maxItems: 2
0030 
0031   clock-names:
0032     maxItems: 2
0033 
0034   ddc-i2c-bus:
0035     $ref: /schemas/types.yaml#/definitions/phandle
0036     description:
0037       The HDMI DDC bus can be connected to either a system I2C master or the
0038       functionally-reduced I2C master contained in the DWC HDMI. When connected
0039       to a system I2C master this property contains a phandle to that I2C
0040       master controller.
0041 
0042   gpr:
0043     $ref: /schemas/types.yaml#/definitions/phandle
0044     description:
0045       phandle to the iomuxc-gpr region containing the HDMI multiplexer control
0046       register.
0047 
0048   ports:
0049     $ref: /schemas/graph.yaml#/properties/ports
0050     description: |
0051       This device has four video ports, corresponding to the four inputs of the
0052       HDMI multiplexer. Each port shall have a single endpoint.
0053 
0054     properties:
0055       port@0:
0056         $ref: /schemas/graph.yaml#/properties/port
0057         description: First input of the HDMI multiplexer
0058 
0059       port@1:
0060         $ref: /schemas/graph.yaml#/properties/port
0061         description: Second input of the HDMI multiplexer
0062 
0063       port@2:
0064         $ref: /schemas/graph.yaml#/properties/port
0065         description: Third input of the HDMI multiplexer
0066 
0067       port@3:
0068         $ref: /schemas/graph.yaml#/properties/port
0069         description: Fourth input of the HDMI multiplexer
0070 
0071     anyOf:
0072       - required:
0073           - port@0
0074       - required:
0075           - port@1
0076       - required:
0077           - port@2
0078       - required:
0079           - port@3
0080 
0081 required:
0082   - compatible
0083   - reg
0084   - clocks
0085   - clock-names
0086   - gpr
0087   - interrupts
0088   - ports
0089 
0090 additionalProperties: false
0091 
0092 examples:
0093   - |
0094     #include <dt-bindings/clock/imx6qdl-clock.h>
0095 
0096     hdmi: hdmi@120000 {
0097         reg = <0x00120000 0x9000>;
0098         interrupts = <0 115 0x04>;
0099         gpr = <&gpr>;
0100         clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>,
0101                  <&clks IMX6QDL_CLK_HDMI_ISFR>;
0102         clock-names = "iahb", "isfr";
0103 
0104         ports {
0105             #address-cells = <1>;
0106             #size-cells = <0>;
0107 
0108             port@0 {
0109                 reg = <0>;
0110 
0111                 hdmi_mux_0: endpoint {
0112                     remote-endpoint = <&ipu1_di0_hdmi>;
0113                 };
0114             };
0115 
0116             port@1 {
0117                 reg = <1>;
0118 
0119                 hdmi_mux_1: endpoint {
0120                     remote-endpoint = <&ipu1_di1_hdmi>;
0121                 };
0122             };
0123         };
0124     };
0125 
0126 ...