0001 Exynos MIPI DSI Master
0002
0003 Required properties:
0004 - compatible: value should be one of the following
0005 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
0006 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
0007 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
0008 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
0009 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
0010 - reg: physical base address and length of the registers set for the device
0011 - interrupts: should contain DSI interrupt
0012 - clocks: list of clock specifiers, must contain an entry for each required
0013 entry in clock-names
0014 - clock-names: should include "bus_clk"and "sclk_mipi" entries
0015 the use of "pll_clk" is deprecated
0016 - phys: list of phy specifiers, must contain an entry for each required
0017 entry in phy-names
0018 - phy-names: should include "dsim" entry
0019 - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
0020 - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
0021 - samsung,pll-clock-frequency: specifies frequency of the oscillator clock
0022 - #address-cells, #size-cells: should be set respectively to <1> and <0>
0023 according to DSI host bindings (see MIPI DSI bindings [1])
0024 - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
0025 mode
0026 - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
0027
0028 Optional properties:
0029 - power-domains: a phandle to DSIM power domain node
0030
0031 Child nodes:
0032 Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
0033
0034 Video interfaces:
0035 Device node can contain following video interface port nodes according to [2]:
0036 0: RGB input,
0037 1: DSI output
0038
0039 [1]: Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
0040 [2]: Documentation/devicetree/bindings/media/video-interfaces.txt
0041
0042 Example:
0043
0044 dsi@11c80000 {
0045 compatible = "samsung,exynos4210-mipi-dsi";
0046 reg = <0x11C80000 0x10000>;
0047 interrupts = <0 79 0>;
0048 clocks = <&clock 286>, <&clock 143>;
0049 clock-names = "bus_clk", "sclk_mipi";
0050 phys = <&mipi_phy 1>;
0051 phy-names = "dsim";
0052 vddcore-supply = <&vusb_reg>;
0053 vddio-supply = <&vmipi_reg>;
0054 power-domains = <&pd_lcd0>;
0055 #address-cells = <1>;
0056 #size-cells = <0>;
0057 samsung,pll-clock-frequency = <24000000>;
0058
0059 panel@1 {
0060 reg = <0>;
0061 ...
0062 port {
0063 panel_ep: endpoint {
0064 remote-endpoint = <&dsi_ep>;
0065 };
0066 };
0067 };
0068
0069 ports {
0070 #address-cells = <1>;
0071 #size-cells = <0>;
0072
0073 port@0 {
0074 reg = <0>;
0075 decon_to_mic: endpoint {
0076 remote-endpoint = <&mic_to_decon>;
0077 };
0078 };
0079
0080 port@1 {
0081 reg = <1>;
0082 dsi_ep: endpoint {
0083 reg = <0>;
0084 samsung,burst-clock-frequency = <500000000>;
0085 samsung,esc-clock-frequency = <20000000>;
0086 remote-endpoint = <&panel_ep>;
0087 };
0088 };
0089 };
0090 };
