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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/arm,malidp.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Arm Mali Display Processor (Mali-DP) binding
0008 
0009 maintainers:
0010   - Liviu Dudau <Liviu.Dudau@arm.com>
0011   - Andre Przywara <andre.przywara@arm.com>
0012 
0013 description:
0014   The following bindings apply to a family of Display Processors sold as
0015   licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
0016   DP650 processors that offer multiple composition layers, support for
0017   rotation and scaling output.
0018 
0019 properties:
0020   compatible:
0021     enum:
0022       - arm,mali-dp500
0023       - arm,mali-dp550
0024       - arm,mali-dp650
0025 
0026   reg:
0027     maxItems: 1
0028 
0029   interrupts:
0030     items:
0031       - description:
0032           The interrupt used by the Display Engine (DE). Can be shared with
0033           the interrupt for the Scaling Engine (SE), but it will have to be
0034           listed individually.
0035       - description:
0036           The interrupt used by the Scaling Engine (SE). Can be shared with
0037           the interrupt for the Display Engine (DE), but it will have to be
0038           listed individually.
0039 
0040   interrupt-names:
0041     items:
0042       - const: DE
0043       - const: SE
0044 
0045   clock-names:
0046     items:
0047       - const: pxlclk
0048       - const: mclk
0049       - const: aclk
0050       - const: pclk
0051 
0052   clocks:
0053     items:
0054       - description: the pixel clock feeding the output PLL of the processor
0055       - description: the main processor clock
0056       - description: the AXI interface clock
0057       - description: the APB interface clock
0058 
0059   memory-region:
0060     maxItems: 1
0061     description:
0062       Phandle to a node describing memory to be used for the framebuffer.
0063       If not present, the framebuffer may be located anywhere in memory.
0064 
0065   arm,malidp-output-port-lines:
0066     $ref: /schemas/types.yaml#/definitions/uint8-array
0067     description:
0068       Number of output lines/bits for each colour channel.
0069     items:
0070       - description: number of output lines for the red channel (R)
0071       - description: number of output lines for the green channel (G)
0072       - description: number of output lines for the blue channel (B)
0073 
0074   arm,malidp-arqos-value:
0075     $ref: /schemas/types.yaml#/definitions/uint32
0076     description:
0077       Quality-of-Service value for the display engine FIFOs, to write
0078       into the RQOS register of the DP500.
0079       See the ARM Mali-DP500 TRM for details on the encoding.
0080       If omitted, the RQOS register will not be changed.
0081 
0082   port:
0083     $ref: /schemas/graph.yaml#/properties/port
0084     unevaluatedProperties: false
0085     description:
0086       Output endpoint of the controller, connecting the LCD panel signals.
0087 
0088 additionalProperties: false
0089 
0090 required:
0091   - compatible
0092   - reg
0093   - interrupts
0094   - interrupt-names
0095   - clocks
0096   - clock-names
0097   - port
0098   - arm,malidp-output-port-lines
0099 
0100 examples:
0101   - |
0102     dp0: malidp@6f200000 {
0103         compatible = "arm,mali-dp650";
0104         reg = <0x6f200000 0x20000>;
0105         memory-region = <&display_reserved>;
0106         interrupts = <168>, <168>;
0107         interrupt-names = "DE", "SE";
0108         clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
0109         clock-names = "pxlclk", "mclk", "aclk", "pclk";
0110         arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
0111         arm,malidp-arqos-value = <0xd000d000>;
0112 
0113         port {
0114             dp0_output: endpoint {
0115                 remote-endpoint = <&tda998x_2_input>;
0116             };
0117         };
0118     };
0119 ...