0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/allwinner,sun9i-a80-deu.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner A80 Detail Enhancement Unit Device Tree Bindings
0008
0009 maintainers:
0010 - Chen-Yu Tsai <wens@csie.org>
0011 - Maxime Ripard <mripard@kernel.org>
0012
0013 description: |
0014 The DEU (Detail Enhancement Unit), found in the Allwinner A80 SoC,
0015 can sharpen the display content in both luma and chroma channels.
0016
0017 properties:
0018 compatible:
0019 const: allwinner,sun9i-a80-deu
0020
0021 reg:
0022 maxItems: 1
0023
0024 interrupts:
0025 maxItems: 1
0026
0027 clocks:
0028 items:
0029 - description: The DEU interface clock
0030 - description: The DEU module clock
0031 - description: The DEU DRAM clock
0032
0033 clock-names:
0034 items:
0035 - const: ahb
0036 - const: mod
0037 - const: ram
0038
0039 resets:
0040 maxItems: 1
0041
0042 ports:
0043 $ref: /schemas/graph.yaml#/properties/ports
0044
0045 properties:
0046 port@0:
0047 $ref: /schemas/graph.yaml#/properties/port
0048 description: |
0049 Input endpoints of the controller.
0050
0051 port@1:
0052 $ref: /schemas/graph.yaml#/properties/port
0053 description: |
0054 Output endpoints of the controller.
0055
0056 required:
0057 - port@0
0058 - port@1
0059
0060 required:
0061 - compatible
0062 - reg
0063 - interrupts
0064 - clocks
0065 - clock-names
0066 - resets
0067 - ports
0068
0069 additionalProperties: false
0070
0071 examples:
0072 - |
0073 #include <dt-bindings/interrupt-controller/arm-gic.h>
0074
0075 #include <dt-bindings/clock/sun9i-a80-de.h>
0076 #include <dt-bindings/reset/sun9i-a80-de.h>
0077
0078 deu0: deu@3300000 {
0079 compatible = "allwinner,sun9i-a80-deu";
0080 reg = <0x03300000 0x40000>;
0081 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
0082 clocks = <&de_clocks CLK_BUS_DEU0>,
0083 <&de_clocks CLK_IEP_DEU0>,
0084 <&de_clocks CLK_DRAM_DEU0>;
0085 clock-names = "ahb",
0086 "mod",
0087 "ram";
0088 resets = <&de_clocks RST_DEU0>;
0089
0090 ports {
0091 #address-cells = <1>;
0092 #size-cells = <0>;
0093
0094 deu0_in: port@0 {
0095 reg = <0>;
0096
0097 deu0_in_fe0: endpoint {
0098 remote-endpoint = <&fe0_out_deu0>;
0099 };
0100 };
0101
0102 deu0_out: port@1 {
0103 #address-cells = <1>;
0104 #size-cells = <0>;
0105 reg = <1>;
0106
0107 deu0_out_be0: endpoint@0 {
0108 reg = <0>;
0109 remote-endpoint = <&be0_in_deu0>;
0110 };
0111
0112 deu0_out_be1: endpoint@1 {
0113 reg = <1>;
0114 remote-endpoint = <&be1_in_deu0>;
0115 };
0116 };
0117 };
0118 };
0119
0120 ...
