0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-hdmi-phy.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner A83t HDMI PHY Device Tree Bindings
0008
0009 maintainers:
0010 - Chen-Yu Tsai <wens@csie.org>
0011 - Maxime Ripard <mripard@kernel.org>
0012
0013 properties:
0014 "#phy-cells":
0015 const: 0
0016
0017 compatible:
0018 enum:
0019 - allwinner,sun8i-a83t-hdmi-phy
0020 - allwinner,sun8i-h3-hdmi-phy
0021 - allwinner,sun8i-r40-hdmi-phy
0022 - allwinner,sun50i-a64-hdmi-phy
0023 - allwinner,sun50i-h6-hdmi-phy
0024
0025 reg:
0026 maxItems: 1
0027
0028 clocks:
0029 minItems: 2
0030 items:
0031 - description: Bus Clock
0032 - description: Module Clock
0033 - description: Parent of the PHY clock
0034 - description: Second possible parent of the PHY clock
0035
0036 clock-names:
0037 minItems: 2
0038 items:
0039 - const: bus
0040 - const: mod
0041 - const: pll-0
0042 - const: pll-1
0043
0044 resets:
0045 maxItems: 1
0046
0047 reset-names:
0048 const: phy
0049
0050 required:
0051 - compatible
0052 - reg
0053 - clocks
0054 - clock-names
0055 - resets
0056 - reset-names
0057
0058 if:
0059 properties:
0060 compatible:
0061 contains:
0062 enum:
0063 - allwinner,sun8i-r40-hdmi-phy
0064
0065 then:
0066 properties:
0067 clocks:
0068 minItems: 4
0069
0070 clock-names:
0071 minItems: 4
0072
0073 else:
0074 if:
0075 properties:
0076 compatible:
0077 contains:
0078 enum:
0079 - allwinner,sun8i-h3-hdmi-phy
0080 - allwinner,sun50i-a64-hdmi-phy
0081
0082 then:
0083 properties:
0084 clocks:
0085 minItems: 3
0086
0087 clock-names:
0088 minItems: 3
0089
0090 else:
0091 properties:
0092 clocks:
0093 maxItems: 2
0094
0095 clock-names:
0096 maxItems: 2
0097
0098 additionalProperties: false
0099
0100 examples:
0101 - |
0102 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
0103 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
0104
0105 hdmi_phy: hdmi-phy@1ef0000 {
0106 compatible = "allwinner,sun8i-a83t-hdmi-phy";
0107 reg = <0x01ef0000 0x10000>;
0108 clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
0109 clock-names = "bus", "mod";
0110 resets = <&ccu RST_BUS_HDMI0>;
0111 reset-names = "phy";
0112 #phy-cells = <0>;
0113 };
0114
0115 ...
