0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner A10 Timings Controller (TCON) Device Tree Bindings
0008
0009 maintainers:
0010 - Chen-Yu Tsai <wens@csie.org>
0011 - Maxime Ripard <mripard@kernel.org>
0012
0013 description: |
0014 The TCON acts as a timing controller for RGB, LVDS and TV
0015 interfaces.
0016
0017 properties:
0018 "#clock-cells":
0019 const: 0
0020
0021 compatible:
0022 oneOf:
0023 - const: allwinner,sun4i-a10-tcon
0024 - const: allwinner,sun5i-a13-tcon
0025 - const: allwinner,sun6i-a31-tcon
0026 - const: allwinner,sun6i-a31s-tcon
0027 - const: allwinner,sun7i-a20-tcon
0028 - const: allwinner,sun8i-a23-tcon
0029 - const: allwinner,sun8i-a33-tcon
0030 - const: allwinner,sun8i-a83t-tcon-lcd
0031 - const: allwinner,sun8i-a83t-tcon-tv
0032 - const: allwinner,sun8i-r40-tcon-tv
0033 - const: allwinner,sun8i-v3s-tcon
0034 - const: allwinner,sun9i-a80-tcon-lcd
0035 - const: allwinner,sun9i-a80-tcon-tv
0036 - const: allwinner,sun20i-d1-tcon-lcd
0037 - const: allwinner,sun20i-d1-tcon-tv
0038
0039 - items:
0040 - enum:
0041 - allwinner,sun7i-a20-tcon0
0042 - allwinner,sun7i-a20-tcon1
0043 - const: allwinner,sun7i-a20-tcon
0044
0045 - items:
0046 - enum:
0047 - allwinner,sun50i-a64-tcon-lcd
0048 - const: allwinner,sun8i-a83t-tcon-lcd
0049
0050 - items:
0051 - enum:
0052 - allwinner,sun8i-h3-tcon-tv
0053 - allwinner,sun50i-a64-tcon-tv
0054 - const: allwinner,sun8i-a83t-tcon-tv
0055
0056 - items:
0057 - enum:
0058 - allwinner,sun50i-h6-tcon-tv
0059 - const: allwinner,sun8i-r40-tcon-tv
0060
0061 reg:
0062 maxItems: 1
0063
0064 interrupts:
0065 maxItems: 1
0066
0067 clocks:
0068 minItems: 1
0069 maxItems: 4
0070
0071 clock-names:
0072 minItems: 1
0073 maxItems: 4
0074
0075 clock-output-names:
0076 description:
0077 Name of the LCD pixel clock created.
0078 maxItems: 1
0079
0080 dmas:
0081 maxItems: 1
0082
0083 resets:
0084 anyOf:
0085 - items:
0086 - description: TCON Reset Line
0087
0088 - items:
0089 - description: TCON Reset Line
0090 - description: TCON LVDS Reset Line
0091
0092 - items:
0093 - description: TCON Reset Line
0094 - description: TCON eDP Reset Line
0095
0096 - items:
0097 - description: TCON Reset Line
0098 - description: TCON eDP Reset Line
0099 - description: TCON LVDS Reset Line
0100
0101 reset-names:
0102 oneOf:
0103 - const: lcd
0104
0105 - items:
0106 - const: lcd
0107 - const: lvds
0108
0109 - items:
0110 - const: lcd
0111 - const: edp
0112
0113 - items:
0114 - const: lcd
0115 - const: edp
0116 - const: lvds
0117
0118 ports:
0119 $ref: /schemas/graph.yaml#/properties/ports
0120
0121 properties:
0122 port@0:
0123 $ref: /schemas/graph.yaml#/properties/port
0124 description: |
0125 Input endpoints of the controller.
0126
0127 port@1:
0128 $ref: /schemas/graph.yaml#/$defs/port-base
0129 unevaluatedProperties: false
0130 description: |
0131 Output endpoints of the controller.
0132
0133 patternProperties:
0134 "^endpoint(@[0-9])$":
0135 $ref: /schemas/graph.yaml#/$defs/endpoint-base
0136 unevaluatedProperties: false
0137
0138 properties:
0139 allwinner,tcon-channel:
0140 $ref: /schemas/types.yaml#/definitions/uint32
0141 description: |
0142 TCON can have 1 or 2 channels, usually with the
0143 first channel being used for the panels interfaces
0144 (RGB, LVDS, etc.), and the second being used for the
0145 outputs that require another controller (TV Encoder,
0146 HDMI, etc.).
0147
0148 If that property is present, specifies the TCON
0149 channel the endpoint is associated to. If that
0150 property is not present, the endpoint number will be
0151 used as the channel number.
0152
0153 required:
0154 - port@0
0155 - port@1
0156
0157 required:
0158 - compatible
0159 - reg
0160 - interrupts
0161 - clocks
0162 - clock-names
0163 - resets
0164 - ports
0165
0166 additionalProperties: false
0167
0168 allOf:
0169 - if:
0170 properties:
0171 compatible:
0172 contains:
0173 enum:
0174 - allwinner,sun4i-a10-tcon
0175 - allwinner,sun5i-a13-tcon
0176 - allwinner,sun7i-a20-tcon
0177
0178 then:
0179 properties:
0180 clocks:
0181 minItems: 3
0182
0183 clock-names:
0184 items:
0185 - const: ahb
0186 - const: tcon-ch0
0187 - const: tcon-ch1
0188
0189 - if:
0190 properties:
0191 compatible:
0192 contains:
0193 enum:
0194 - allwinner,sun6i-a31-tcon
0195 - allwinner,sun6i-a31s-tcon
0196
0197 then:
0198 properties:
0199 clocks:
0200 minItems: 4
0201
0202 clock-names:
0203 items:
0204 - const: ahb
0205 - const: tcon-ch0
0206 - const: tcon-ch1
0207 - const: lvds-alt
0208
0209 - if:
0210 properties:
0211 compatible:
0212 contains:
0213 enum:
0214 - allwinner,sun8i-a23-tcon
0215 - allwinner,sun8i-a33-tcon
0216
0217 then:
0218 properties:
0219 clocks:
0220 minItems: 3
0221
0222 clock-names:
0223 items:
0224 - const: ahb
0225 - const: tcon-ch0
0226 - const: lvds-alt
0227
0228 - if:
0229 properties:
0230 compatible:
0231 contains:
0232 enum:
0233 - allwinner,sun8i-a83t-tcon-lcd
0234 - allwinner,sun8i-v3s-tcon
0235 - allwinner,sun9i-a80-tcon-lcd
0236 - allwinner,sun20i-d1-tcon-lcd
0237
0238 then:
0239 properties:
0240 clocks:
0241 minItems: 2
0242
0243 clock-names:
0244 items:
0245 - const: ahb
0246 - const: tcon-ch0
0247
0248 - if:
0249 properties:
0250 compatible:
0251 contains:
0252 enum:
0253 - allwinner,sun8i-a83t-tcon-tv
0254 - allwinner,sun8i-r40-tcon-tv
0255 - allwinner,sun9i-a80-tcon-tv
0256 - allwinner,sun20i-d1-tcon-tv
0257
0258 then:
0259 properties:
0260 clocks:
0261 minItems: 2
0262
0263 clock-names:
0264 items:
0265 - const: ahb
0266 - const: tcon-ch1
0267
0268 - if:
0269 properties:
0270 compatible:
0271 contains:
0272 enum:
0273 - allwinner,sun5i-a13-tcon
0274 - allwinner,sun6i-a31-tcon
0275 - allwinner,sun6i-a31s-tcon
0276 - allwinner,sun7i-a20-tcon
0277 - allwinner,sun8i-a23-tcon
0278 - allwinner,sun8i-a33-tcon
0279 - allwinner,sun8i-v3s-tcon
0280 - allwinner,sun9i-a80-tcon-lcd
0281 - allwinner,sun4i-a10-tcon
0282 - allwinner,sun8i-a83t-tcon-lcd
0283 - allwinner,sun20i-d1-tcon-lcd
0284
0285 then:
0286 required:
0287 - "#clock-cells"
0288 - clock-output-names
0289
0290 - if:
0291 properties:
0292 compatible:
0293 contains:
0294 enum:
0295 - allwinner,sun6i-a31-tcon
0296 - allwinner,sun6i-a31s-tcon
0297 - allwinner,sun8i-a23-tcon
0298 - allwinner,sun8i-a33-tcon
0299 - allwinner,sun8i-a83t-tcon-lcd
0300 - allwinner,sun20i-d1-tcon-lcd
0301
0302 then:
0303 properties:
0304 resets:
0305 minItems: 2
0306
0307 reset-names:
0308 items:
0309 - const: lcd
0310 - const: lvds
0311
0312 - if:
0313 properties:
0314 compatible:
0315 contains:
0316 enum:
0317 - allwinner,sun9i-a80-tcon-lcd
0318
0319 then:
0320 properties:
0321 resets:
0322 minItems: 3
0323
0324 reset-names:
0325 items:
0326 - const: lcd
0327 - const: edp
0328 - const: lvds
0329
0330 - if:
0331 properties:
0332 compatible:
0333 contains:
0334 enum:
0335 - allwinner,sun9i-a80-tcon-tv
0336
0337 then:
0338 properties:
0339 resets:
0340 minItems: 2
0341
0342 reset-names:
0343 items:
0344 - const: lcd
0345 - const: edp
0346
0347 - if:
0348 properties:
0349 compatible:
0350 contains:
0351 enum:
0352 - allwinner,sun4i-a10-tcon
0353 - allwinner,sun5i-a13-tcon
0354 - allwinner,sun6i-a31-tcon
0355 - allwinner,sun6i-a31s-tcon
0356 - allwinner,sun7i-a20-tcon
0357 - allwinner,sun8i-a23-tcon
0358 - allwinner,sun8i-a33-tcon
0359
0360 then:
0361 required:
0362 - dmas
0363
0364 examples:
0365 - |
0366 #include <dt-bindings/dma/sun4i-a10.h>
0367
0368 /*
0369 * This comes from the clock/sun4i-a10-ccu.h and
0370 * reset/sun4i-a10-ccu.h headers, but we can't include them since
0371 * it would trigger a bunch of warnings for redefinitions of
0372 * symbols with the other example.
0373 */
0374
0375 #define CLK_AHB_LCD0 56
0376 #define CLK_TCON0_CH0 149
0377 #define CLK_TCON0_CH1 155
0378 #define RST_TCON0 11
0379
0380 lcd-controller@1c0c000 {
0381 compatible = "allwinner,sun4i-a10-tcon";
0382 reg = <0x01c0c000 0x1000>;
0383 interrupts = <44>;
0384 resets = <&ccu RST_TCON0>;
0385 reset-names = "lcd";
0386 clocks = <&ccu CLK_AHB_LCD0>,
0387 <&ccu CLK_TCON0_CH0>,
0388 <&ccu CLK_TCON0_CH1>;
0389 clock-names = "ahb",
0390 "tcon-ch0",
0391 "tcon-ch1";
0392 clock-output-names = "tcon0-pixel-clock";
0393 #clock-cells = <0>;
0394 dmas = <&dma SUN4I_DMA_DEDICATED 14>;
0395
0396 ports {
0397 #address-cells = <1>;
0398 #size-cells = <0>;
0399
0400 port@0 {
0401 #address-cells = <1>;
0402 #size-cells = <0>;
0403 reg = <0>;
0404
0405 endpoint@0 {
0406 reg = <0>;
0407 remote-endpoint = <&be0_out_tcon0>;
0408 };
0409
0410 endpoint@1 {
0411 reg = <1>;
0412 remote-endpoint = <&be1_out_tcon0>;
0413 };
0414 };
0415
0416 port@1 {
0417 #address-cells = <1>;
0418 #size-cells = <0>;
0419 reg = <1>;
0420
0421 endpoint@1 {
0422 reg = <1>;
0423 remote-endpoint = <&hdmi_in_tcon0>;
0424 allwinner,tcon-channel = <1>;
0425 };
0426 };
0427 };
0428 };
0429
0430 #undef CLK_AHB_LCD0
0431 #undef CLK_TCON0_CH0
0432 #undef CLK_TCON0_CH1
0433 #undef RST_TCON0
0434
0435 - |
0436 #include <dt-bindings/interrupt-controller/arm-gic.h>
0437
0438 /*
0439 * This comes from the clock/sun6i-a31-ccu.h and
0440 * reset/sun6i-a31-ccu.h headers, but we can't include them since
0441 * it would trigger a bunch of warnings for redefinitions of
0442 * symbols with the other example.
0443 */
0444
0445 #define CLK_PLL_MIPI 15
0446 #define CLK_AHB1_LCD0 47
0447 #define CLK_LCD0_CH0 127
0448 #define CLK_LCD0_CH1 129
0449 #define RST_AHB1_LCD0 27
0450 #define RST_AHB1_LVDS 41
0451
0452 lcd-controller@1c0c000 {
0453 compatible = "allwinner,sun6i-a31-tcon";
0454 reg = <0x01c0c000 0x1000>;
0455 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
0456 dmas = <&dma 11>;
0457 resets = <&ccu RST_AHB1_LCD0>, <&ccu RST_AHB1_LVDS>;
0458 reset-names = "lcd", "lvds";
0459 clocks = <&ccu CLK_AHB1_LCD0>,
0460 <&ccu CLK_LCD0_CH0>,
0461 <&ccu CLK_LCD0_CH1>,
0462 <&ccu CLK_PLL_MIPI>;
0463 clock-names = "ahb",
0464 "tcon-ch0",
0465 "tcon-ch1",
0466 "lvds-alt";
0467 clock-output-names = "tcon0-pixel-clock";
0468 #clock-cells = <0>;
0469
0470 ports {
0471 #address-cells = <1>;
0472 #size-cells = <0>;
0473
0474 port@0 {
0475 #address-cells = <1>;
0476 #size-cells = <0>;
0477 reg = <0>;
0478
0479 endpoint@0 {
0480 reg = <0>;
0481 remote-endpoint = <&drc0_out_tcon0>;
0482 };
0483
0484 endpoint@1 {
0485 reg = <1>;
0486 remote-endpoint = <&drc1_out_tcon0>;
0487 };
0488 };
0489
0490 port@1 {
0491 #address-cells = <1>;
0492 #size-cells = <0>;
0493 reg = <1>;
0494
0495 endpoint@1 {
0496 reg = <1>;
0497 remote-endpoint = <&hdmi_in_tcon0>;
0498 allwinner,tcon-channel = <1>;
0499 };
0500 };
0501 };
0502 };
0503
0504 #undef CLK_PLL_MIPI
0505 #undef CLK_AHB1_LCD0
0506 #undef CLK_LCD0_CH0
0507 #undef CLK_LCD0_CH1
0508 #undef RST_AHB1_LCD0
0509 #undef RST_AHB1_LVDS
0510
0511 - |
0512 #include <dt-bindings/interrupt-controller/arm-gic.h>
0513
0514 /*
0515 * This comes from the clock/sun9i-a80-ccu.h and
0516 * reset/sun9i-a80-ccu.h headers, but we can't include them since
0517 * it would trigger a bunch of warnings for redefinitions of
0518 * symbols with the other example.
0519 */
0520
0521 #define CLK_BUS_LCD0 102
0522 #define CLK_LCD0 58
0523 #define RST_BUS_LCD0 22
0524 #define RST_BUS_EDP 24
0525 #define RST_BUS_LVDS 25
0526
0527 lcd-controller@3c00000 {
0528 compatible = "allwinner,sun9i-a80-tcon-lcd";
0529 reg = <0x03c00000 0x10000>;
0530 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
0531 clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;
0532 clock-names = "ahb", "tcon-ch0";
0533 resets = <&ccu RST_BUS_LCD0>, <&ccu RST_BUS_EDP>, <&ccu RST_BUS_LVDS>;
0534 reset-names = "lcd", "edp", "lvds";
0535 clock-output-names = "tcon0-pixel-clock";
0536 #clock-cells = <0>;
0537
0538 ports {
0539 #address-cells = <1>;
0540 #size-cells = <0>;
0541
0542 port@0 {
0543 reg = <0>;
0544
0545 endpoint {
0546 remote-endpoint = <&drc0_out_tcon0>;
0547 };
0548 };
0549
0550 port@1 {
0551 reg = <1>;
0552 };
0553 };
0554 };
0555
0556 #undef CLK_BUS_TCON0
0557 #undef CLK_TCON0
0558 #undef RST_BUS_TCON0
0559 #undef RST_BUS_EDP
0560 #undef RST_BUS_LVDS
0561
0562 - |
0563 #include <dt-bindings/interrupt-controller/arm-gic.h>
0564
0565 /*
0566 * This comes from the clock/sun8i-a83t-ccu.h and
0567 * reset/sun8i-a83t-ccu.h headers, but we can't include them since
0568 * it would trigger a bunch of warnings for redefinitions of
0569 * symbols with the other example.
0570 */
0571
0572 #define CLK_BUS_TCON0 36
0573 #define CLK_TCON0 85
0574 #define RST_BUS_TCON0 22
0575 #define RST_BUS_LVDS 31
0576
0577 lcd-controller@1c0c000 {
0578 compatible = "allwinner,sun8i-a83t-tcon-lcd";
0579 reg = <0x01c0c000 0x1000>;
0580 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
0581 clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
0582 clock-names = "ahb", "tcon-ch0";
0583 clock-output-names = "tcon-pixel-clock";
0584 #clock-cells = <0>;
0585 resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
0586 reset-names = "lcd", "lvds";
0587
0588 ports {
0589 #address-cells = <1>;
0590 #size-cells = <0>;
0591
0592 port@0 {
0593 #address-cells = <1>;
0594 #size-cells = <0>;
0595 reg = <0>;
0596
0597 endpoint@0 {
0598 reg = <0>;
0599 remote-endpoint = <&mixer0_out_tcon0>;
0600 };
0601
0602 endpoint@1 {
0603 reg = <1>;
0604 remote-endpoint = <&mixer1_out_tcon0>;
0605 };
0606 };
0607
0608 port@1 {
0609 reg = <1>;
0610 };
0611 };
0612 };
0613
0614 #undef CLK_BUS_TCON0
0615 #undef CLK_TCON0
0616 #undef RST_BUS_TCON0
0617 #undef RST_BUS_LVDS
0618
0619 - |
0620 #include <dt-bindings/interrupt-controller/arm-gic.h>
0621
0622 /*
0623 * This comes from the clock/sun8i-r40-ccu.h and
0624 * reset/sun8i-r40-ccu.h headers, but we can't include them since
0625 * it would trigger a bunch of warnings for redefinitions of
0626 * symbols with the other example.
0627 */
0628
0629 #define CLK_BUS_TCON_TV0 73
0630 #define RST_BUS_TCON_TV0 49
0631
0632 tcon_tv0: lcd-controller@1c73000 {
0633 compatible = "allwinner,sun8i-r40-tcon-tv";
0634 reg = <0x01c73000 0x1000>;
0635 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
0636 clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>;
0637 clock-names = "ahb", "tcon-ch1";
0638 resets = <&ccu RST_BUS_TCON_TV0>;
0639 reset-names = "lcd";
0640
0641 ports {
0642 #address-cells = <1>;
0643 #size-cells = <0>;
0644
0645 port@0 {
0646 #address-cells = <1>;
0647 #size-cells = <0>;
0648 reg = <0>;
0649
0650 endpoint@0 {
0651 reg = <0>;
0652 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
0653 };
0654
0655 endpoint@1 {
0656 reg = <1>;
0657 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
0658 };
0659 };
0660
0661 tcon_tv0_out: port@1 {
0662 #address-cells = <1>;
0663 #size-cells = <0>;
0664 reg = <1>;
0665
0666 endpoint@1 {
0667 reg = <1>;
0668 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
0669 };
0670 };
0671 };
0672 };
0673
0674 #undef CLK_BUS_TCON_TV0
0675 #undef RST_BUS_TCON_TV0
0676
0677 ...
