0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner A10 HDMI Controller Device Tree Bindings
0008
0009 description: |
0010 The HDMI Encoder supports the HDMI video and audio outputs, and does
0011 CEC. It is one end of the pipeline.
0012
0013 maintainers:
0014 - Chen-Yu Tsai <wens@csie.org>
0015 - Maxime Ripard <mripard@kernel.org>
0016
0017 properties:
0018 compatible:
0019 oneOf:
0020 - const: allwinner,sun4i-a10-hdmi
0021 - const: allwinner,sun5i-a10s-hdmi
0022 - const: allwinner,sun6i-a31-hdmi
0023 - items:
0024 - const: allwinner,sun7i-a20-hdmi
0025 - const: allwinner,sun5i-a10s-hdmi
0026
0027 reg:
0028 maxItems: 1
0029
0030 interrupts:
0031 maxItems: 1
0032
0033 clocks:
0034 oneOf:
0035 - items:
0036 - description: The HDMI interface clock
0037 - description: The HDMI module clock
0038 - description: The first video PLL
0039 - description: The second video PLL
0040
0041 - items:
0042 - description: The HDMI interface clock
0043 - description: The HDMI module clock
0044 - description: The HDMI DDC clock
0045 - description: The first video PLL
0046 - description: The second video PLL
0047
0048 clock-names:
0049 oneOf:
0050 - items:
0051 - const: ahb
0052 - const: mod
0053 - const: pll-0
0054 - const: pll-1
0055
0056 - items:
0057 - const: ahb
0058 - const: mod
0059 - const: ddc
0060 - const: pll-0
0061 - const: pll-1
0062
0063 resets:
0064 maxItems: 1
0065
0066 dmas:
0067 items:
0068 - description: DDC Transmission DMA Channel
0069 - description: DDC Reception DMA Channel
0070 - description: Audio Transmission DMA Channel
0071
0072 dma-names:
0073 items:
0074 - const: ddc-tx
0075 - const: ddc-rx
0076 - const: audio-tx
0077
0078 ports:
0079 $ref: /schemas/graph.yaml#/properties/ports
0080
0081 properties:
0082 port@0:
0083 $ref: /schemas/graph.yaml#/properties/port
0084 description: |
0085 Input endpoints of the controller.
0086
0087 port@1:
0088 $ref: /schemas/graph.yaml#/properties/port
0089 description: |
0090 Output endpoints of the controller. Usually an HDMI
0091 connector.
0092
0093 required:
0094 - port@0
0095 - port@1
0096
0097 required:
0098 - compatible
0099 - reg
0100 - interrupts
0101 - clocks
0102 - clock-names
0103 - dmas
0104 - dma-names
0105
0106 if:
0107 properties:
0108 compatible:
0109 contains:
0110 const: allwinner,sun6i-a31-hdmi
0111
0112 then:
0113 properties:
0114 clocks:
0115 minItems: 5
0116
0117 clock-names:
0118 minItems: 5
0119
0120 required:
0121 - resets
0122
0123 additionalProperties: false
0124
0125 examples:
0126 - |
0127 #include <dt-bindings/clock/sun4i-a10-ccu.h>
0128 #include <dt-bindings/dma/sun4i-a10.h>
0129 #include <dt-bindings/reset/sun4i-a10-ccu.h>
0130
0131 hdmi: hdmi@1c16000 {
0132 compatible = "allwinner,sun4i-a10-hdmi";
0133 reg = <0x01c16000 0x1000>;
0134 interrupts = <58>;
0135 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
0136 <&ccu CLK_PLL_VIDEO0_2X>,
0137 <&ccu CLK_PLL_VIDEO1_2X>;
0138 clock-names = "ahb", "mod", "pll-0", "pll-1";
0139 dmas = <&dma SUN4I_DMA_NORMAL 16>,
0140 <&dma SUN4I_DMA_NORMAL 16>,
0141 <&dma SUN4I_DMA_DEDICATED 24>;
0142 dma-names = "ddc-tx", "ddc-rx", "audio-tx";
0143
0144 ports {
0145 #address-cells = <1>;
0146 #size-cells = <0>;
0147
0148 hdmi_in: port@0 {
0149 #address-cells = <1>;
0150 #size-cells = <0>;
0151 reg = <0>;
0152
0153 hdmi_in_tcon0: endpoint@0 {
0154 reg = <0>;
0155 remote-endpoint = <&tcon0_out_hdmi>;
0156 };
0157
0158 hdmi_in_tcon1: endpoint@1 {
0159 reg = <1>;
0160 remote-endpoint = <&tcon1_out_hdmi>;
0161 };
0162 };
0163
0164 hdmi_out: port@1 {
0165 reg = <1>;
0166 };
0167 };
0168 };
0169
0170 ...
