0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner A10 Display Engine Backend Device Tree Bindings
0008
0009 maintainers:
0010 - Chen-Yu Tsai <wens@csie.org>
0011 - Maxime Ripard <mripard@kernel.org>
0012
0013 description: |
0014 The display engine backend exposes layers and sprites to the system.
0015
0016 properties:
0017 compatible:
0018 enum:
0019 - allwinner,sun4i-a10-display-backend
0020 - allwinner,sun5i-a13-display-backend
0021 - allwinner,sun6i-a31-display-backend
0022 - allwinner,sun7i-a20-display-backend
0023 - allwinner,sun8i-a23-display-backend
0024 - allwinner,sun8i-a33-display-backend
0025 - allwinner,sun9i-a80-display-backend
0026
0027 reg:
0028 minItems: 1
0029 items:
0030 - description: Display Backend registers
0031 - description: SAT registers
0032
0033 reg-names:
0034 minItems: 1
0035 items:
0036 - const: be
0037 - const: sat
0038
0039 interrupts:
0040 maxItems: 1
0041
0042 clocks:
0043 minItems: 3
0044 items:
0045 - description: The backend interface clock
0046 - description: The backend module clock
0047 - description: The backend DRAM clock
0048 - description: The SAT clock
0049
0050 clock-names:
0051 minItems: 3
0052 items:
0053 - const: ahb
0054 - const: mod
0055 - const: ram
0056 - const: sat
0057
0058 resets:
0059 minItems: 1
0060 items:
0061 - description: The Backend reset line
0062 - description: The SAT reset line
0063
0064 reset-names:
0065 minItems: 1
0066 items:
0067 - const: be
0068 - const: sat
0069
0070 # FIXME: This should be made required eventually once every SoC will
0071 # have the MBUS declared.
0072 interconnects:
0073 maxItems: 1
0074
0075 # FIXME: This should be made required eventually once every SoC will
0076 # have the MBUS declared.
0077 interconnect-names:
0078 const: dma-mem
0079
0080 ports:
0081 $ref: /schemas/graph.yaml#/properties/ports
0082
0083 properties:
0084 port@0:
0085 $ref: /schemas/graph.yaml#/properties/port
0086 description:
0087 Input endpoints of the controller.
0088
0089 port@1:
0090 $ref: /schemas/graph.yaml#/properties/port
0091 description:
0092 Output endpoints of the controller.
0093
0094 required:
0095 - port@0
0096 - port@1
0097
0098 required:
0099 - compatible
0100 - reg
0101 - interrupts
0102 - clocks
0103 - clock-names
0104 - resets
0105 - ports
0106
0107 additionalProperties: false
0108
0109 if:
0110 properties:
0111 compatible:
0112 contains:
0113 const: allwinner,sun8i-a33-display-backend
0114
0115 then:
0116 properties:
0117 reg:
0118 minItems: 2
0119
0120 reg-names:
0121 minItems: 2
0122
0123 clocks:
0124 minItems: 4
0125
0126 clock-names:
0127 minItems: 4
0128
0129 resets:
0130 minItems: 2
0131
0132 reset-names:
0133 minItems: 2
0134
0135 required:
0136 - reg-names
0137 - reset-names
0138
0139 else:
0140 properties:
0141 reg:
0142 maxItems: 1
0143
0144 reg-names:
0145 maxItems: 1
0146
0147 clocks:
0148 maxItems: 3
0149
0150 clock-names:
0151 maxItems: 3
0152
0153 resets:
0154 maxItems: 1
0155
0156 reset-names:
0157 maxItems: 1
0158
0159 examples:
0160 - |
0161 /*
0162 * This comes from the clock/sun4i-a10-ccu.h and
0163 * reset/sun4i-a10-ccu.h headers, but we can't include them since
0164 * it would trigger a bunch of warnings for redefinitions of
0165 * symbols with the other example.
0166 */
0167
0168 #define CLK_AHB_DE_BE0 42
0169 #define CLK_DRAM_DE_BE0 140
0170 #define CLK_DE_BE0 144
0171 #define RST_DE_BE0 5
0172
0173 display-backend@1e60000 {
0174 compatible = "allwinner,sun4i-a10-display-backend";
0175 reg = <0x01e60000 0x10000>;
0176 interrupts = <47>;
0177 clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
0178 <&ccu CLK_DRAM_DE_BE0>;
0179 clock-names = "ahb", "mod",
0180 "ram";
0181 resets = <&ccu RST_DE_BE0>;
0182
0183 ports {
0184 #address-cells = <1>;
0185 #size-cells = <0>;
0186
0187 port@0 {
0188 #address-cells = <1>;
0189 #size-cells = <0>;
0190 reg = <0>;
0191
0192 endpoint@0 {
0193 reg = <0>;
0194 remote-endpoint = <&fe0_out_be0>;
0195 };
0196
0197 endpoint@1 {
0198 reg = <1>;
0199 remote-endpoint = <&fe1_out_be0>;
0200 };
0201 };
0202
0203 port@1 {
0204 #address-cells = <1>;
0205 #size-cells = <0>;
0206 reg = <1>;
0207
0208 endpoint@0 {
0209 reg = <0>;
0210 remote-endpoint = <&tcon0_in_be0>;
0211 };
0212
0213 endpoint@1 {
0214 reg = <1>;
0215 remote-endpoint = <&tcon1_in_be0>;
0216 };
0217 };
0218 };
0219 };
0220
0221 - |
0222 #include <dt-bindings/interrupt-controller/arm-gic.h>
0223
0224 /*
0225 * This comes from the clock/sun8i-a23-a33-ccu.h and
0226 * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
0227 * since it would trigger a bunch of warnings for redefinitions of
0228 * symbols with the other example.
0229 */
0230
0231 #define CLK_BUS_DE_BE 40
0232 #define CLK_BUS_SAT 46
0233 #define CLK_DRAM_DE_BE 84
0234 #define CLK_DE_BE 85
0235 #define RST_BUS_DE_BE 21
0236 #define RST_BUS_SAT 27
0237
0238 display-backend@1e60000 {
0239 compatible = "allwinner,sun8i-a33-display-backend";
0240 reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
0241 reg-names = "be", "sat";
0242 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
0243 clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
0244 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
0245 clock-names = "ahb", "mod",
0246 "ram", "sat";
0247 resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
0248 reset-names = "be", "sat";
0249
0250 ports {
0251 #address-cells = <1>;
0252 #size-cells = <0>;
0253
0254 port@0 {
0255 reg = <0>;
0256
0257 endpoint {
0258 remote-endpoint = <&fe0_out_be0>;
0259 };
0260 };
0261
0262 port@1 {
0263 reg = <1>;
0264
0265 endpoint {
0266 remote-endpoint = <&drc0_in_be0>;
0267 };
0268 };
0269 };
0270 };
0271
0272 ...
