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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: STMicroelectronics STM32 HASH bindings
0008 
0009 maintainers:
0010   - Lionel Debieve <lionel.debieve@foss.st.com>
0011 
0012 properties:
0013   compatible:
0014     enum:
0015       - st,stm32f456-hash
0016       - st,stm32f756-hash
0017 
0018   reg:
0019     maxItems: 1
0020 
0021   clocks:
0022     maxItems: 1
0023 
0024   interrupts:
0025     maxItems: 1
0026 
0027   resets:
0028     maxItems: 1
0029 
0030   dmas:
0031     maxItems: 1
0032 
0033   dma-names:
0034     items:
0035       - const: in
0036 
0037   dma-maxburst:
0038     description: Set number of maximum dma burst supported
0039     $ref: /schemas/types.yaml#/definitions/uint32
0040     minimum: 0
0041     maximum: 2
0042     default: 0
0043 
0044 required:
0045   - compatible
0046   - reg
0047   - clocks
0048   - interrupts
0049 
0050 additionalProperties: false
0051 
0052 examples:
0053   - |
0054     #include <dt-bindings/interrupt-controller/arm-gic.h>
0055     #include <dt-bindings/clock/stm32mp1-clks.h>
0056     #include <dt-bindings/reset/stm32mp1-resets.h>
0057     hash@54002000 {
0058       compatible = "st,stm32f756-hash";
0059       reg = <0x54002000 0x400>;
0060       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
0061       clocks = <&rcc HASH1>;
0062       resets = <&rcc HASH1_R>;
0063       dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>;
0064       dma-names = "in";
0065       dma-maxburst = <2>;
0066     };
0067 
0068 ...