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OSCL-LXR

 
 

    


0001 MediaTek cryptographic accelerators
0002 
0003 Required properties:
0004 - compatible: Should be "mediatek,eip97-crypto"
0005 - reg: Address and length of the register set for the device
0006 - interrupts: Should contain the five crypto engines interrupts in numeric
0007         order. These are global system and four descriptor rings.
0008 - clocks: the clock used by the core
0009 - clock-names: Must contain "cryp".
0010 - power-domains: Must contain a reference to the PM domain.
0011 
0012 
0013 Example:
0014         crypto: crypto@1b240000 {
0015                 compatible = "mediatek,eip97-crypto";
0016                 reg = <0 0x1b240000 0 0x20000>;
0017                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>,
0018                              <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>,
0019                              <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
0020                              <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
0021                              <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
0022                 clocks = <&ethsys CLK_ETHSYS_CRYPTO>;
0023                 clock-names = "cryp";
0024                 power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
0025         };