bindings/crypto/intel%2Ckeembay-ocs-hcu.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Intel Keem Bay OCS HCU Device Tree Bindings
0008
0009 maintainers:
0010   - Declan Murphy <declan.murphy@intel.com>
0011   - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
0012
0013 description:
0014   The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit (HCU)
0015   provides hardware-accelerated hashing and HMAC.
0016
0017 properties:
0018   compatible:
0019     const: intel,keembay-ocs-hcu
0020
0021   reg:
0022     maxItems: 1
0023
0024   interrupts:
0025     maxItems: 1
0026
0027   clocks:
0028     maxItems: 1
0029
0030 required:
0031   - compatible
0032   - reg
0033   - interrupts
0034   - clocks
0035
0036 additionalProperties: false
0037
0038 examples:
0039   - |
0040     #include <dt-bindings/interrupt-controller/arm-gic.h>
0041     crypto@3000b000 {
0042       compatible = "intel,keembay-ocs-hcu";
0043       reg = <0x3000b000 0x1000>;
0044       interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
0045       clocks = <&scmi_clk 94>;
0046     };