bindings/crypto/intel%2Ckeembay-ocs-ecc.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-ecc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Intel Keem Bay OCS ECC Device Tree Bindings
0008
0009 maintainers:
0010   - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
0011   - Prabhjot Khurana <prabhjot.khurana@intel.com>
0012
0013 description:
0014   The Intel Keem Bay Offload and Crypto Subsystem (OCS) Elliptic Curve
0015   Cryptography (ECC) device provides hardware acceleration for elliptic curve
0016   cryptography using the NIST P-256 and NIST P-384 elliptic curves.
0017
0018 properties:
0019   compatible:
0020     const: intel,keembay-ocs-ecc
0021
0022   reg:
0023     maxItems: 1
0024
0025   interrupts:
0026     maxItems: 1
0027
0028   clocks:
0029     maxItems: 1
0030
0031 required:
0032   - compatible
0033   - reg
0034   - interrupts
0035   - clocks
0036
0037 additionalProperties: false
0038
0039 examples:
0040   - |
0041     #include <dt-bindings/interrupt-controller/arm-gic.h>
0042     crypto@30001000 {
0043       compatible = "intel,keembay-ocs-ecc";
0044       reg = <0x30001000 0x1000>;
0045       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
0046       clocks = <&scmi_clk 95>;
0047     };