0001 TI CPUFreq and OPP bindings
0002 ================================
0003
0004 Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
0005 families support different OPPs depending on the silicon variant in use.
0006 The ti-cpufreq driver can use revision and an efuse value from the SoC to
0007 provide the OPP framework with supported hardware information. This is
0008 used to determine which OPPs from the operating-points-v2 table get enabled
0009 when it is parsed by the OPP framework.
0010
0011 Required properties:
0012 --------------------
0013 In 'cpus' nodes:
0014 - operating-points-v2: Phandle to the operating-points-v2 table to use.
0015
0016 In 'operating-points-v2' table:
0017 - compatible: Should be
0018 - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
0019 omap34xx, omap36xx and am3517 SoCs
0020 - syscon: A phandle pointing to a syscon node representing the control module
0021 register space of the SoC.
0022
0023 Optional properties:
0024 --------------------
0025 - "vdd-supply", "vbb-supply": to define two regulators for dra7xx
0026 - "cpu0-supply", "vbb-supply": to define two regulators for omap36xx
0027
0028 For each opp entry in 'operating-points-v2' table:
0029 - opp-supported-hw: Two bitfields indicating:
0030 1. Which revision of the SoC the OPP is supported by
0031 2. Which eFuse bits indicate this OPP is available
0032
0033 A bitwise AND is performed against these values and if any bit
0034 matches, the OPP gets enabled.
0035
0036 Example:
0037 --------
0038
0039 /* From arch/arm/boot/dts/am33xx.dtsi */
0040 cpus {
0041 #address-cells = <1>;
0042 #size-cells = <0>;
0043 cpu@0 {
0044 compatible = "arm,cortex-a8";
0045 device_type = "cpu";
0046 reg = <0>;
0047
0048 operating-points-v2 = <&cpu0_opp_table>;
0049
0050 clocks = <&dpll_mpu_ck>;
0051 clock-names = "cpu";
0052
0053 clock-latency = <300000>; /* From omap-cpufreq driver */
0054 };
0055 };
0056
0057 /*
0058 * cpu0 has different OPPs depending on SoC revision and some on revisions
0059 * 0x2 and 0x4 have eFuse bits that indicate if they are available or not
0060 */
0061 cpu0_opp_table: opp-table {
0062 compatible = "operating-points-v2-ti-cpu";
0063 syscon = <&scm_conf>;
0064
0065 /*
0066 * The three following nodes are marked with opp-suspend
0067 * because they can not be enabled simultaneously on a
0068 * single SoC.
0069 */
0070 opp50-300000000 {
0071 opp-hz = /bits/ 64 <300000000>;
0072 opp-microvolt = <950000 931000 969000>;
0073 opp-supported-hw = <0x06 0x0010>;
0074 opp-suspend;
0075 };
0076
0077 opp100-275000000 {
0078 opp-hz = /bits/ 64 <275000000>;
0079 opp-microvolt = <1100000 1078000 1122000>;
0080 opp-supported-hw = <0x01 0x00FF>;
0081 opp-suspend;
0082 };
0083
0084 opp100-300000000 {
0085 opp-hz = /bits/ 64 <300000000>;
0086 opp-microvolt = <1100000 1078000 1122000>;
0087 opp-supported-hw = <0x06 0x0020>;
0088 opp-suspend;
0089 };
0090
0091 opp100-500000000 {
0092 opp-hz = /bits/ 64 <500000000>;
0093 opp-microvolt = <1100000 1078000 1122000>;
0094 opp-supported-hw = <0x01 0xFFFF>;
0095 };
0096
0097 opp100-600000000 {
0098 opp-hz = /bits/ 64 <600000000>;
0099 opp-microvolt = <1100000 1078000 1122000>;
0100 opp-supported-hw = <0x06 0x0040>;
0101 };
0102
0103 opp120-600000000 {
0104 opp-hz = /bits/ 64 <600000000>;
0105 opp-microvolt = <1200000 1176000 1224000>;
0106 opp-supported-hw = <0x01 0xFFFF>;
0107 };
0108
0109 opp120-720000000 {
0110 opp-hz = /bits/ 64 <720000000>;
0111 opp-microvolt = <1200000 1176000 1224000>;
0112 opp-supported-hw = <0x06 0x0080>;
0113 };
0114
0115 oppturbo-720000000 {
0116 opp-hz = /bits/ 64 <720000000>;
0117 opp-microvolt = <1260000 1234800 1285200>;
0118 opp-supported-hw = <0x01 0xFFFF>;
0119 };
0120
0121 oppturbo-800000000 {
0122 opp-hz = /bits/ 64 <800000000>;
0123 opp-microvolt = <1260000 1234800 1285200>;
0124 opp-supported-hw = <0x06 0x0100>;
0125 };
0126
0127 oppnitro-1000000000 {
0128 opp-hz = /bits/ 64 <1000000000>;
0129 opp-microvolt = <1325000 1298500 1351500>;
0130 opp-supported-hw = <0x04 0x0200>;
0131 };
0132 };
