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OSCL-LXR

 
 

    


0001 Common properties
0002 =================
0003 
0004 Endianness
0005 ----------
0006 
0007 The Devicetree Specification does not define any properties related to hardware
0008 byte swapping, but endianness issues show up frequently in porting drivers to
0009 different machine types.  This document attempts to provide a consistent
0010 way of handling byte swapping across drivers.
0011 
0012 Optional properties:
0013  - big-endian: Boolean; force big endian register accesses
0014    unconditionally (e.g. ioread32be/iowrite32be).  Use this if you
0015    know the peripheral always needs to be accessed in big endian (BE) mode.
0016  - little-endian: Boolean; force little endian register accesses
0017    unconditionally (e.g. readl/writel).  Use this if you know the
0018    peripheral always needs to be accessed in little endian (LE) mode.
0019  - native-endian: Boolean; always use register accesses matched to the
0020    endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
0021    BE vmlinux -> ioread32be/iowrite32be).  In this case no byte swaps
0022    will ever be performed.  Use this if the hardware "self-adjusts"
0023    register endianness based on the CPU's configured endianness.
0024 
0025 If a binding supports these properties, then the binding should also
0026 specify the default behavior if none of these properties are present.
0027 In such cases, little-endian is the preferred default, but it is not
0028 a requirement.  Some implementations assume that little-endian is
0029 the default, because most existing (PCI-based) drivers implicitly
0030 default to LE for their MMIO accesses.
0031 
0032 Examples:
0033 Scenario 1 : CPU in LE mode & device in LE mode.
0034 dev: dev@40031000 {
0035               compatible = "name";
0036               reg = <0x40031000 0x1000>;
0037               ...
0038               native-endian;
0039 };
0040 
0041 Scenario 2 : CPU in LE mode & device in BE mode.
0042 dev: dev@40031000 {
0043               compatible = "name";
0044               reg = <0x40031000 0x1000>;
0045               ...
0046               big-endian;
0047 };
0048 
0049 Scenario 3 : CPU in BE mode & device in BE mode.
0050 dev: dev@40031000 {
0051               compatible = "name";
0052               reg = <0x40031000 0x1000>;
0053               ...
0054               native-endian;
0055 };
0056 
0057 Scenario 4 : CPU in BE mode & device in LE mode.
0058 dev: dev@40031000 {
0059               compatible = "name";
0060               reg = <0x40031000 0x1000>;
0061               ...
0062               little-endian;
0063 };
0064 
0065 Daisy-chained devices
0066 ---------------------
0067 
0068 Many serially-attached GPIO and IIO devices are daisy-chainable.  To the
0069 host controller, a daisy-chain appears as a single device, but the number
0070 of inputs and outputs it provides is the sum of inputs and outputs provided
0071 by all of its devices.  The driver needs to know how many devices the
0072 daisy-chain comprises to determine the amount of data exchanged, how many
0073 inputs and outputs to register and so on.
0074 
0075 Optional properties:
0076  - #daisy-chained-devices: Number of devices in the daisy-chain (default is 1).
0077 
0078 Example:
0079 gpio@0 {
0080               compatible = "name";
0081               reg = <0>;
0082               gpio-controller;
0083               #gpio-cells = <2>;
0084               #daisy-chained-devices = <3>;
0085 };