0001 * Clock bindings for Freescale Vybrid VF610 SOC
0002
0003 Required properties:
0004 - compatible: Should be "fsl,vf610-ccm"
0005 - reg: Address and length of the register set
0006 - #clock-cells: Should be <1>
0007
0008 Optional properties:
0009 - clocks: list of clock identifiers which are external input clocks to the
0010 given clock controller. Please refer the next section to find
0011 the input clocks for a given controller.
0012 - clock-names: list of names of clocks which are exteral input clocks to the
0013 given clock controller.
0014
0015 Input clocks for top clock controller:
0016 - sxosc (external crystal oscillator 32KHz, recommended)
0017 - fxosc (external crystal oscillator 24MHz, recommended)
0018 - audio_ext
0019 - enet_ext
0020
0021 The clock consumer should specify the desired clock by having the clock
0022 ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
0023 for the full list of VF610 clock IDs.
0024
0025 Examples:
0026
0027 clks: ccm@4006b000 {
0028 compatible = "fsl,vf610-ccm";
0029 reg = <0x4006b000 0x1000>;
0030 #clock-cells = <1>;
0031 clocks = <&sxosc>, <&fxosc>;
0032 clock-names = "sxosc", "fxosc";
0033 };
0034
0035 uart1: serial@40028000 {
0036 compatible = "fsl,vf610-uart";
0037 reg = <0x40028000 0x1000>;
0038 interrupts = <0 62 0x04>;
0039 clocks = <&clks VF610_CLK_UART1>;
0040 clock-names = "ipg";
0041 };
